公开(公告)号：US12105661B2

公开(公告)日：2024-10-01

申请号：US17843245

申请日：2022-06-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minshik Seok ,  Siyoung Ok ,  Jaekyu Jang ,  Seungjae Lee ,  Younghoon Lee ,  Jeehye Lee ,  Sangjoo Jun

IPC: G06F13/42 ,  G06F1/30 ,  G06F9/4401

CPC classification number: G06F13/4208 ,  G06F1/30 ,  G06F9/4405

Abstract: An electronic device is provided. The electronic device includes a first power management integrated circuit (PMIC) with a first fault controller connected to a first node and a first interface circuit connected to a second node; a second PMIC with a second fault controller connected to the first node and a second interface circuit connected to the second node; and a third PMIC with a third fault controller connected to the first node and a third interface circuit connected to the second node. The first fault controller is configured to, during a power on sequence or a power off sequence, detect a change in a voltage level of the first node. The first interface circuit is configured to communicate with any one or any combination of the second interface circuit and communication and the third interface circuit based on the change in the voltage level of the first node.

公开(公告)号：US20230019075A1

公开(公告)日：2023-01-19

申请号：US17843245

申请日：2022-06-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： MINSHIK SEOK ,  Siyoung Ok ,  Jaekyu Jang ,  Seungjae Lee ,  Younghoon Lee ,  Jeehye Lee ,  Sangjoo Jun

IPC: G06F13/42 ,  G06F9/4401 ,  G06F1/30

Abstract: An electronic device is provided. The electronic device includes a first power management integrated circuit (PMIC) with a first fault controller connected to a first node and a first interface circuit connected to a second node; a second PMIC with a second fault controller connected to the first node and a second interface circuit connected to the second node; and a third PMIC with a third fault controller connected to the first node and a third interface circuit connected to the second node. The first fault controller is configured to, during a power on sequence or a power off sequence, detect a change in a voltage level of the first node. The first interface circuit is configured to communicate with any one or any combination of the second interface circuit and communication and the third interface circuit based on the change in the voltage level of the first node.