公开(公告)号：US20150024810A1

公开(公告)日：2015-01-22

申请号：US14511533

申请日：2014-10-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Oh Yong KWON ,  Jeon Il LEE

IPC: H04M1/02 ,  H04B1/38

CPC classification number: H04M1/0202 ,  H01Q1/243 ,  H01Q1/48 ,  H01Q1/52 ,  H01Q13/16 ,  H04B1/3838

Abstract: A mobile terminal that can prevent radiation performance deterioration of an antenna is provided. The mobile terminal includes a circuit board in which an antenna and one or more key buttons are mounted, a housing mounted on the antenna and the circuit board, and a case for enclosing a periphery of the one or more key buttons and having a plurality of openings according to the quantity of the key buttons, wherein an antenna adjacent opening among the plurality of openings is extended through a slot toward an edge of the case to embody a loop antenna. Therefore, radiation deterioration of an antenna due to a case can be prevented. In addition, production costs can be minimized, and a desired external appearance of the mobile terminal is not compromised.

Abstract translation: 提供了可以防止天线的辐射性能劣化的移动终端。 移动终端包括其中安装有天线和一个或多个按键的电路板，安装在天线和电路板上的壳体，以及用于封闭一个或多个按键的周围并具有多个 根据键按钮的数量的开口，其中，所述多个开口中的相邻开口的天线通过槽朝向所述壳体的边缘延伸以体现环形天线。 因此，可以防止由于壳体引起的天线的辐射恶化。 此外，可以使生产成本最小化，并且不会影响移动终端的期望的外观。

公开(公告)号：US20240107774A1

公开(公告)日：2024-03-28

申请号：US18321243

申请日：2023-05-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeon Il LEE ,  Kyunghwan LEE

IPC: H10B51/20 ,  H10B51/30 ,  H10B51/40

CPC classification number: H10B51/20 ,  H10B51/30 ,  H10B51/40

Abstract: A semiconductor memory device includes first through structures on a substrate, the first through structures arranged in a first direction, an electrode adjacent to the first through structures and extending horizontally in the first direction along the first through structures, and a ferroelectric layer interposed between the electrode and the first through structures. Each of the first through structures includes a first conductive pillar and a second conductive pillar spaced apart from each other in the first direction, a channel layer extending from a sidewall of the first conductive pillar to a sidewall of the second conductive pillar, the channel layer interposed between the ferroelectric layer and the first and second conductive pillars, the first and second conductive pillars being spaced apart from each other in the first direction and defining a first air gap. Adjacent ones of the first through structures define a second air gap.

公开(公告)号：US20250105215A1

公开(公告)日：2025-03-27

申请号：US18624892

申请日：2024-04-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Keumhyo KANG ,  Hongsoo KIM ,  Jeon Il LEE

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/48 ,  H10B12/00

Abstract: Disclosed are semiconductor packages and electronic systems. The semiconductor package comprises a first semiconductor chip that includes a first peripheral circuit structure and a first memory cell structure on the first peripheral circuit structure and a second semiconductor chip that includes a second peripheral circuit structure and a second memory cell structure on the second peripheral circuit structure. The first peripheral circuit structure includes a first substrate, a controller on the first substrate, and a first driver circuit on the first substrate. The second peripheral circuit structure includes a second substrate and a second driver circuit on the second substrate. The controller is electrically connected to the first driver circuit and the second driver circuit.

公开(公告)号：US20230030117A1

公开(公告)日：2023-02-02

申请号：US17714202

申请日：2022-04-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Juik LEE ,  Jong-Min LEE ,  Jimin CHOI ,  Yeonjin LEE ,  Jeon Il LEE

IPC: H01L23/48 ,  H01L23/522 ,  H01L23/528 ,  H01L25/065 ,  H01L23/00 ,  H01L25/10

Abstract: A semiconductor device includes a substrate including a first side and a second side opposite to each other, a first penetrating structure that penetrates the substrate, and a second penetrating structure that penetrates the substrate, the second penetrating structure being spaced apart from the first penetrating structure, and an area of the first penetrating structure being more than twice an area of the second penetrating structure, as viewed from the first side of the substrate.

公开(公告)号：US20230422511A1

公开(公告)日：2023-12-28

申请号：US18171858

申请日：2023-02-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeon Il LEE ,  Min Hee CHO

IPC: H10B51/20 ,  H10B51/10 ,  H10B51/40 ,  H01L23/528 ,  H01L23/522 ,  H01L29/51

CPC classification number: H10B51/20 ,  H10B51/10 ,  H10B51/40 ,  H01L23/5283 ,  H01L23/5226 ,  H01L29/516

Abstract: A 3D semiconductor memory device includes a first through-structure on a substrate, the first through-structure comprising first and second conductive pillars spaced apart from each other in a first direction, an electrode adjacent to the first through-structure, the electrode horizontally extending in the first direction, and a ferroelectric layer and a channel layer between the electrode and the first and second conductive pillars. The channel layer connects the first and second conductive pillars to each other. The ferroelectric layer is disposed between the electrode and the channel layer. The ferroelectric layer extends from a sidewall of the first conductive pillar to a sidewall of the second conductive pillar along the channel layer when viewed in a plan view.