公开(公告)号：US20200161308A1

公开(公告)日：2020-05-21

申请号：US16749791

申请日：2020-01-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin-A KIM ,  Yong-Kwan Kim ,  Se-Keun Park ,  Joo-Young Lee ,  Cha-Won Koh ,  Yeong-Cheol Lee

IPC: H01L27/108

Abstract: A semiconductor device and methods of manufacturing the same are provided. The semiconductor device includes a substrate, buried semiconductor layers, a word line, a bit line, buried contacts, and insulation spacers, and a charge storage. The substrate has active regions and field regions. The buried semiconductor layers are buried in the substrate at the active regions. The word line is buried in the substrate and crosses one of the active regions. The bit line is disposed in one of the active regions. The buried contacts are disposed on the active regions and the field regions. The insulation spacers are disposed on the substrate and on a sidewall of the buried contacts, respectively. The charge storage is disposed on one or more of the buried contacts. The buried semiconductor layers contact, respectively, one of the buried contacts and one of the insulation spacers.

公开(公告)号：US20190206873A1

公开(公告)日：2019-07-04

申请号：US16171517

申请日：2018-10-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin-A KIM ,  Yong-Kwan KIM ,  Se-Keun PARK ,  Jung-Woo SONG ,  Joo-Young LEE

IPC: H01L27/108 ,  H01L21/768

CPC classification number: H01L27/10885 ,  H01L21/7682 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10855

Abstract: A semiconductor device includes a bit line structure on a substrate, a spacer structure including a first spacer directly contacting a sidewall of the bit line structure, a second spacer directly contacting a portion of an outer sidewall of the first spacer, the second spacer including air, and a third spacer directly contacting an upper portion of the first spacer and covering an outer sidewall and an upper surface of the second spacer, and a contact plug structure extending in a vertical direction substantially perpendicular to an upper surface of the substrate and directly contacting an outer sidewall of the third spacer at least at a height between respective heights of a bottom and a top surface of the second spacer.

公开(公告)号：US20190206872A1

公开(公告)日：2019-07-04

申请号：US16170665

申请日：2018-10-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin-A KIM ,  Yong-Kwan KIM ,  Se-Keun PARK ,  Joo-Young LEE ,  Cha-Won KOH ,  Yeong-Cheol LEE

IPC: H01L27/108

CPC classification number: H01L27/10855 ,  H01L21/28525 ,  H01L21/3065 ,  H01L21/76879 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10885 ,  H01L27/10888

Abstract: A semiconductor device and methods of manufacturing the same are provided. The semiconductor device includes a substrate, word lines, a doped junction, bit line structures, and buried contacts. The substrate has active regions. The word lines extend across the active regions. The doped junction has impurities and is arranged at the active regions, and includes first junctions and second junctions, each first junction arranged at a central portion of one of the active regions and each second junction arranged at an end portion of another one of the active regions, a buried semiconductor layer being included in each second junction. The bit line structures contact with a respective one of the first junctions. The buried contacts are arranged in a matrix shape, each contacting with a respective one of the second junctions and the included buried semiconductor layer and simultaneously contacting with a charge storage for storing data.