公开(公告)号：US20240162228A1

公开(公告)日：2024-05-16

申请号：US18219875

申请日：2023-07-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dongkyu LEE ,  Hyungjoo NA ,  Jinchan YUN ,  Cheoljin YUN ,  Kyuman HWANG

IPC: H01L27/092 ,  H01L21/822 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775

CPC classification number: H01L27/0922 ,  H01L21/8221 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823871 ,  H01L21/823878 ,  H01L29/0673 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775

Abstract: A three-dimensional semiconductor device includes a lower connection structure; a device structure; and an upper connection structure sequentially disposed along a first direction, wherein the device structure includes a substrate on the lower connection structure; first and second source/drain patterns on the substrate; a separation pattern adjacent in a second direction to the source/drain patterns, the second direction being parallel to a bottom surface of the substrate; and a through conductive pattern adjacent in a third direction to the separation pattern, the third direction being parallel to the bottom surface of the substrate and intersecting the second direction, the through conductive pattern connects the lower connection structure and the upper connection structure to each other, and the through conductive pattern is connected either through the lower connection structure to the first source/drain pattern or through the upper connection structure to the second source/drain pattern.