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公开(公告)号:US20250098269A1
公开(公告)日:2025-03-20
申请号:US18762812
申请日:2024-07-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jaehyun CHOI , Dongsik KONG , Jihye KWON , Junsoo KIM , Junbum LEE
IPC: H01L29/423 , H01L29/78 , H10B12/00
Abstract: An integrated circuit device includes a substrate having formed therein a word line trench extending long in a first horizontal direction, a gate dielectric film covering an inner surface of the word line trench, a word line on the gate dielectric film, the word line filling a lower space of the word line trench and extending long in the first horizontal direction, an insulating capping pattern on the word line, the insulating capping pattern filling an upper space of the word line trench and extending long in the first horizontal direction, and at least one ferroelectric layer arranged at a top portion of the word line and including a first sidewall in contact with the gate dielectric film.
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公开(公告)号:US20240268098A1
公开(公告)日:2024-08-08
申请号:US18510949
申请日:2023-11-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Junsoo KIM , Dongsik KONG , Jihye KWON , Junbum LEE , Sungho JANG
CPC classification number: H10B12/315 , H01L29/66666 , H01L29/7827 , H10B12/053 , H10B12/34
Abstract: A semiconductor device includes a first active pattern protruding from a substrate; a gate structure including a gate insulation layer and a gate pattern laterally stacked on a first sidewall of the first active pattern, the gate pattern facing the first sidewall of the first active pattern and extending a first direction parallel to an upper surface of the substrate; and first conductive patterns contacting the gate insulation layer and protruding from a sidewall of the gate structure. The first conductive patterns may be disposed to face second and third sidewalls in the first direction of the first active pattern, and first conductive patterns may be spaced apart from the first active pattern.
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