公开(公告)号：US20210272893A1

公开(公告)日：2021-09-02

申请号：US17016977

申请日：2020-09-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyun-Seung SONG ,  Kwang-Young LEE ,  Jonghyun LEE

IPC: H01L23/528 ,  H01L27/11 ,  H01L21/768

Abstract: A semiconductor device includes a first active pattern on a substrate; a first gate electrode crossing the first active pattern; source/drain patterns in an upper portion of the first active pattern and at opposite sides, respectively, of the first gate electrode; a first gate capping pattern on the first gate electrode; an interlayer insulating layer on the source/drain patterns; first and second active contacts penetrating the interlayer insulating layer and being respectively connected to the pair of source/drain patterns; and a first interconnection layer on the first and second active contacts. The first interconnection layer may include a first insulating structure covering a top surface of the second active contact; and a first interconnection line covering a top surface of the first active contact and extending on the first insulating structure, and covering a top surface of the first gate capping pattern between the first and second active contacts.

公开(公告)号：US20220271123A1

公开(公告)日：2022-08-25

申请号：US17663202

申请日：2022-05-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kwang-Young LEE ,  Jin Wook LEE

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/66 ,  H01L29/417 ,  H01L21/768 ,  H01L21/8234

Abstract: A semiconductor device includes a source/drain pattern disposed on a substrate and a source/drain contact connected to the source/drain pattern. The source/drain contact includes a lower contact structure extending in a first direction and an upper contact structure protruding from the lower contact structure. The upper contact structure includes a first sidewall and a second sidewall facing away from each other in the first direction. The first sidewall of the upper contact structure includes a plurality of first sub-sidewalls, and each of the first sub-sidewalls includes a concave surface.

公开(公告)号：US20240266394A1

公开(公告)日：2024-08-08

申请号：US18639948

申请日：2024-04-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kwang-Young LEE ,  Jin Wook LEE

IPC: H01L29/06 ,  H01L21/768 ,  H01L21/8234 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/0669 ,  H01L21/76895 ,  H01L21/823475 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/785

Abstract: A semiconductor device includes a source/drain pattern disposed on a substrate and a source/drain contact connected to the source/drain pattern. The source/drain contact includes a lower contact structure extending in a first direction and an upper contact structure protruding from the lower contact structure. The upper contact structure includes a first sidewall and a second sidewall facing away from each other in the first direction. The first sidewall of the upper contact structure includes a plurality of first sub-sidewalls, and each of the first sub-sidewalls includes a concave surface.

公开(公告)号：US20220302017A1

公开(公告)日：2022-09-22

申请号：US17830811

申请日：2022-06-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyun-Seung SONG ,  Kwang-Young LEE ,  Jonghyun LEE

IPC: H01L23/528 ,  H01L27/11 ,  H01L21/768

Abstract: A semiconductor device includes a first active pattern on a substrate; a first gate electrode crossing the first active pattern; source/drain patterns in an upper portion of the first active pattern and at opposite sides, respectively, of the first gate electrode; a first gate capping pattern on the first gate electrode; an interlayer insulating layer on the source/drain patterns; first and second active contacts penetrating the interlayer insulating layer and being respectively connected to the pair of source/drain patterns; and a first interconnection layer on the first and second active contacts. The first interconnection layer may include a first insulating structure covering a top surface of the second active contact; and a first interconnection line covering a top surface of the first active contact and extending on the first insulating structure, and covering a top surface of the first gate capping pattern between the first and second active contacts.