公开(公告)号：US20240179423A1

公开(公告)日：2024-05-30

申请号：US18449248

申请日：2023-08-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： MINOH KIM ,  PILSU KIM ,  DAEHO LEE ,  JONGSEONG CHOI ,  CHANGHOON CHOI

IPC: H04N23/81 ,  G06T7/13 ,  G06T7/90 ,  H04N23/741 ,  H04N23/84

CPC classification number: H04N23/81 ,  G06T7/13 ,  G06T7/90 ,  H04N23/741 ,  H04N23/84 ,  G06T2207/10024 ,  G06T2207/20208 ,  G06T2207/20221

Abstract: An image signal processor includes a noise reduction circuit, a high dynamic range (HDR) circuit and post-processing circuit. The noise reduction circuit performs noise reduction operation on a plurality of exposure noise images each respectively corresponding to one of a plurality of brightness levels to generate a plurality of exposure clean images in a first operation mode and performs the noise reduction operation on a single noise image corresponding to one brightness level to generate a single clean image in a second operation mode. The HDR circuit merges the plurality of exposure clean images to generate an HDR image in the first operation mode. The post-processing circuit generates an output image by processing the HDR image or the single clean image.