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    SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
    1.
    发明申请
    SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME 有权

    公开(公告)号：US20250062304A1

    公开(公告)日：2025-02-20

    申请号：US18749275

    申请日：2024-06-20

    Applicant: SAMSUNG ELECTRONICS CO., LTD

    Inventor： SEOKGEUN AHN ,  JUHYEON OH ,  DAEHO LEE ,  MINHYUK JUNG ,  EUNHEE JUNG

    IPC: H01L25/18 ,  G02B6/42 ,  H01L23/00 ,  H01L23/48 ,  H01L23/528 ,  H01L25/00

    Abstract: A semiconductor package includes a package substrate, a semiconductor chip disposed on an upper surface of the package substrate, and an EIC chip disposed on the package substrate and spaced apart from the semiconductor chip in a horizontal direction parallel to the upper surface of the package substrate. The semiconductor package further includes a PIC chip disposed on an upper surface of the EIC chip, wherein a horizontal surface area of the PIC chip is greater than a horizontal surface area of the EIC chip, and wherein a portion of PIC chip protrudes horizontally from the EIC chip. The semiconductor package further includes a reflective portion disposed on a lower surface of the portion of the PIC chip and spaced apart from the EIC chip in the horizontal direction, and an optical fiber connected to the reflective portion and spaced apart from the PIC chip in a vertical direction.

    SEMICONDUCTOR PACKAGE
    2.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20250006714A1

    公开(公告)日：2025-01-02

    申请号：US18762255

    申请日：2024-07-02

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： DAEHO LEE ,  JINHYUN KIM ,  WANSOO PARK

    IPC: H01L25/10 ,  H01L23/00 ,  H01L23/498

    Abstract: A semiconductor package includes a first redistribution substrate, a first semiconductor chip disposed on the first redistribution substrate, a first mold layer that covers the first semiconductor chip and the first redistribution substrate, a second redistribution substrate disposed on the first mold layer, a second semiconductor chip disposed on the second redistribution substrate, where the second semiconductor chip includes a second-chip first conductive bump that does not overlap the first semiconductor chip, a first sidewall that overlaps the first semiconductor chip, and a second sidewall that does not overlap the first semiconductor chip, wherein the first sidewall and the second sidewall are opposite to each other, and a first mold via that penetrates the first mold layer connects the second-chip first conductive bump to the first redistribution substrate, and overlaps the second-chip first conductive bump.

    SEMICONDUCTOR PACKAGE
    3.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20220320053A1

    公开(公告)日：2022-10-06

    申请号：US17457660

    申请日：2021-12-05

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： DAEHO LEE ,  JINHYUN KIM ,  WANSOO PARK

    IPC: H01L25/10 ,  H01L23/498 ,  H01L23/00

    Abstract: A semiconductor package includes a first redistribution substrate, a first semiconductor chip disposed on the first redistribution substrate, a first mold layer that covers the first semiconductor chip and the first redistribution substrate, a second redistribution substrate disposed on the first mold layer, a second semiconductor chip disposed on the second redistribution substrate, where the second semiconductor chip includes a second-chip first conductive bump that does not overlap the first semiconductor chip, a first sidewall that overlaps the first semiconductor chip, and a second sidewall that does not overlap the first semiconductor chip, wherein the first sidewall and the second sidewall are opposite to each other, and a first mold via that penetrates the first mold layer connects the second-chip first conductive bump to the first redistribution substrate, and overlaps the second-chip first conductive bump.

    SEMICONDUCTOR PACKAGE
    4.
    发明公开
    SEMICONDUCTOR PACKAGE 审中-公开

    公开(公告)号：US20240355796A1

    公开(公告)日：2024-10-24

    申请号：US18761580

    申请日：2024-07-02

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： DAEHO LEE ,  JINHYUN KIM ,  WANSOO PARK

    IPC: H01L25/10 ,  H01L23/00 ,  H01L23/498

    CPC classification number: H01L25/105 ,  H01L23/49822 ,  H01L23/49833 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/1023

    Abstract: A semiconductor package includes a first redistribution substrate, a first semiconductor chip disposed on the first redistribution substrate, a first mold layer that covers the first semiconductor chip and the first redistribution substrate, a second redistribution substrate disposed on the first mold layer, a second semiconductor chip disposed on the second redistribution substrate, where the second semiconductor chip includes a second-chip first conductive bump that does not overlap the first semiconductor chip, a first sidewall that overlaps the first semiconductor chip, and a second sidewall that does not overlap the first semiconductor chip, wherein the first sidewall and the second sidewall are opposite to each other, and a first mold via that penetrates the first mold layer connects the second-chip first conductive bump to the first redistribution substrate, and overlaps the second-chip first conductive bump.

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