公开(公告)号：US09806204B2

公开(公告)日：2017-10-31

申请号：US14536250

申请日：2014-11-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung-Soo Ahn ,  O Ik Kwon ,  Bum-Soo Kim ,  Hyun-Sung Kim ,  Kyoung-Sub Shin ,  Min-Kyung Yun ,  Seung-Pil Chung ,  Won-Bong Jung

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/788 ,  H01L21/768 ,  H01L27/11521 ,  H01L29/423

CPC classification number: H01L29/7883 ,  H01L21/7682 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/42364 ,  H01L29/66825 ,  H01L29/7881

Abstract: A method of manufacturing a semiconductor device, the method including forming a tunnel insulating layer on an upper surface of a substrate, forming gate patterns on an upper surface of the tunnel insulating layer, forming capping layer patterns on sidewalls of the gate patterns and on the upper surface of the tunnel insulating layer, etching a portion of the tunnel insulating layer that is not covered with the gate patterns or the capping layer patterns to form a tunnel insulating layer pattern, and forming a first insulating layer on the upper surface of the substrate to cover the gate patterns, the capping layer patterns, and the tunnel insulating layer pattern, wherein the first insulating layer has an air gap between the capping layer patterns.