公开(公告)号：US20170110372A1

公开(公告)日：2017-04-20

申请号：US15392725

申请日：2016-12-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SANGHOON BAEK ,  JAE-HO PARK ,  SEOLUN YANG ,  TAEJOONG SONG ,  SANG-KYU OH

IPC: H01L21/8234 ,  H01L21/308 ,  H01L29/78 ,  H01L27/02 ,  H01L27/108 ,  H01L27/11 ,  H01L21/027 ,  H01L21/762

CPC classification number: H01L21/823431 ,  H01L21/0274 ,  H01L21/308 ,  H01L21/3086 ,  H01L21/76224 ,  H01L21/823437 ,  H01L21/823475 ,  H01L21/823481 ,  H01L27/0207 ,  H01L27/10879 ,  H01L27/10894 ,  H01L27/11 ,  H01L27/1104 ,  H01L27/1116 ,  H01L29/7851

Abstract: A method of fabricating a semiconductor device having a first region, a second region, and a third region between the first and second regions includes forming first and second preliminary active patterns protruding from a substrate in the first and second regions, respectively, forming mask patterns exposing the third region on the substrate, performing a first etching process using the mask patterns an etch mask to form first and second active patterns, respectively, and forming gate structures on the substrate.