公开(公告)号：US20150137251A1

公开(公告)日：2015-05-21

申请号：US14454476

申请日：2014-08-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUNGHEE LEE ,  EUI-CHUL JEONG ,  NARA KIM ,  SEUNG HWAN KIM ,  DONGWOO WOO ,  SANGHOON LEE ,  SUNGJOO LEE

IPC: H01L29/06 ,  H01L29/78 ,  H01L21/02 ,  H01L29/423 ,  H01L27/108 ,  H01L21/762

CPC classification number: H01L29/7846 ,  H01L21/76224 ,  H01L27/10876 ,  H01L27/10888 ,  H01L29/4236 ,  H01L29/66621

Abstract: A semiconductor device includes a substrate and a device isolation pattern extending from a surface of the substrate into the substrate. The device isolation pattern has an electrically negative property and a physically tensile property. The device isolation pattern delimits an active region of the substrate. A transistor is provided at the active region and has a channel region formed by part of the active region.

Abstract translation: 半导体器件包括从衬底的表面延伸到衬底中的衬底和器件隔离图案。 器件隔离图案具有电负性质和物理拉伸特性。 器件隔离图案限定衬底的有源区。 晶体管设置在有源区，并具有由有源区的一部分形成的沟道区。

公开(公告)号：US20240306371A1

公开(公告)日：2024-09-12

申请号：US18462553

申请日：2023-09-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HAEIN JUNG ,  SUNGHO JANG ,  JISEOK KWON ,  SEUNG HWAN KIM ,  SEUNGHO HONG

IPC: H10B12/00

CPC classification number: H10B12/36 ,  H10B12/315 ,  H10B12/482 ,  H10B12/485 ,  H10B12/488

Abstract: A semiconductor device includes a semiconductor substrate including a first semiconductor material, a gate structure on the semiconductor substrate, and a semiconductor pattern including a second semiconductor material, between the semiconductor substrate and the gate structure. The semiconductor pattern is in contact with the semiconductor substrate, the gate structure passes through a portion of the semiconductor pattern, and is spaced apart from the semiconductor substrate, and the first semiconductor material is different from the second semiconductor material.

公开(公告)号：US20210366832A1

公开(公告)日：2021-11-25

申请号：US17392705

申请日：2021-08-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JONGHO PARK ,  SEUNG HWAN KIM ,  JUN YOUNG OH ,  Kyong Hwan KOH ,  SANGSOO KIM ,  DONG-JU JANG

IPC: H01L23/538 ,  H01L25/065 ,  H01L23/16 ,  H01L23/31

Abstract: A semiconductor package including: a first package; a second package on the first package, the second package including a second package substrate, first and second semiconductor chips on the second package substrate, and a second molding part on the second package substrate and covering the first and second semiconductor chips; and a fill part between the first package and the second package, a first through hole that penetrates the second package substrate, the first through hole being between the first and second semiconductor chips, a second through hole that penetrates the second molding part, the second through hole being connected to the first through hole, and wherein the fill part has an extension disposed in the first through hole and the second through hole.