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    TEXTURE CACHE MEMORY SYSTEM OF NON-BLOCKING FOR TEXTURE MAPPING PIPELINE AND OPERATION METHOD OF TEXTURE CACHE MEMORY
    2.
    发明申请
    TEXTURE CACHE MEMORY SYSTEM OF NON-BLOCKING FOR TEXTURE MAPPING PIPELINE AND OPERATION METHOD OF TEXTURE CACHE MEMORY 有权
    用于纹理映射管道的非阻塞纹理缓存存储器系统和纹理缓存存储器的操作方法

    公开(公告)号：US20140244939A1

    公开(公告)日：2014-08-28

    申请号：US13966889

    申请日：2013-08-14

    Applicant: INDUSTRY & ACADEMIC COOPERATION GROUP OF SEJONG UNIVERSITY ,  SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kwon Taek KWON ,  Young Sik Kim ,  Woo Chan Park ,  Young Duke Seo ,  Sang Oak Woo ,  Seok Yoon Jung ,  Duk Ki Hong

    IPC: G06F12/08

    CPC classification number: G06F12/0875 ,  G06F12/0855

    Abstract: A non-blocking texture cache memory for a texture mapping pipeline and an operation method of the non-blocking texture cache memory may include: a retry buffer configured to temporarily store result data according to a hit pipeline or a miss pipeline; a retry buffer lookup unit configured to look up the retry buffer in response to a texture request transferred from a processor; a verification unit configured to verify whether result data corresponding to the texture request is stored in the retry buffer as the lookup result; and an output control unit configured to output the stored result data to the processor when the result data corresponding to the texture request is stored as the verification result.

    Abstract translation: 用于纹理映射流水线的非阻塞纹理缓存存储器和非阻塞纹理缓存存储器的操作方法可以包括：重试缓冲器，其被配置为根据命中管道或遗漏流水线临时存储结果数据; 重试缓冲器查找单元，被配置为响应于从处理器传送的纹理请求来查找重试缓冲器; 验证单元，被配置为验证与纹理请求相对应的结果数据是否作为查找结果存储在重试缓冲器中; 以及输出控制单元，被配置为当存储与纹理请求对应的结果数据作为验证结果时，将存储的结果数据输出到处理器。

    METHOD AND APPARATUS FOR GRAPHIC PROCESSING USING MULTI-THREADING
    4.
    发明申请
    METHOD AND APPARATUS FOR GRAPHIC PROCESSING USING MULTI-THREADING 有权
    使用多线程进行图形处理的方法和装置

    公开(公告)号：US20130176323A1

    公开(公告)日：2013-07-11

    申请号：US13669918

    申请日：2012-11-06

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sung Jin SON ,  Sang Oak Woo ,  Seok Yoon Jung ,  Vladislav Y. Aranov ,  Sergey Y. Belyaev ,  Pavel O. Smirnov

    IPC: G06T1/00 ,  G09G5/00

    CPC classification number: G09G5/001 ,  G06F9/5038 ,  G06F2209/509 ,  G06T1/20 ,  G06T15/005 ,  G09G5/363 ,  G09G2360/08

    Abstract: A method and apparatus for graphic processing using multi-threading are provided. At least one context task, mediation task, and control task are executed by a processor. The at least one context task sequentially generates graphic commands. The mediation task mediates processing of the graphic commands. The mediation task may process a particular graphic command on behalf of the at least one context task, and change a processing order of the graphic commands. The control task transmits the graphic commands to a graphic hardware.

    Abstract translation: 提供了一种使用多线程进行图形处理的方法和装置。 处理器执行至少一个上下文任务，中介任务和控制任务。 所述至少一个上下文任务顺序地生成图形命令。 调解任务调解图形命令的处理。 中介任务可以代表至少一个上下文任务处理特定图形命令，并且改变图形命令的处理顺序。 控制任务将图形命令传输到图形硬件。

    Method and apparatus for tile-based rendering
    7.
    发明授权
    Method and apparatus for tile-based rendering 有权
    基于瓦片渲染的方法和装置

    公开(公告)号：US09569813B2

    公开(公告)日：2017-02-14

    申请号：US13875585

    申请日：2013-05-02

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sung Jin Son ,  Sang Oak Woo ,  Seok Yoon Jung

    IPC: G06T15/00 ,  G06T1/60

    CPC classification number: G06T1/60 ,  G06T15/005

    Abstract: A method for tile-based rendering may include verifying a size of a memory available in an apparatus for rendering, and determining a number of buffers required for performing a rendering based on graphics data input, and may further include determining a size of a tile to be used for performing the rendering based on the determined number of buffers and the size of the memory available.

    Abstract translation: 用于基于瓦片的呈现的方法可以包括验证用于呈现的设备中可用的存储器的大小，以及基于图形数据输入来确定执行渲染所需的缓冲器的数量，并且还可以包括确定块的大小 用于基于确定的缓冲器数量和可用存储器的大小执行渲染。

    Method and apparatus for dynamic data configuration
    8.
    发明授权
    Method and apparatus for dynamic data configuration 有权
    用于动态数据配置的方法和装置

    公开(公告)号：US09342282B2

    公开(公告)日：2016-05-17

    申请号：US13962364

    申请日：2013-08-08

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sung Jin Son ,  Sang Oak Woo ,  Seok Yoon Jung

    IPC: G06F9/45 ,  G06F9/445

    CPC classification number: G06F8/443 ,  G06F8/441 ,  G06F9/445 ,  G06F9/44536 ,  G06F9/44557

    Abstract: A method and apparatus for configuring dynamic data are provided. A compilation apparatus may select a data format showing an optimum performance when a binary code is executed, from among a plurality of data formats supported by an execution apparatus used to execute a binary code, and may generate a binary code that uses the selected data format. The execution apparatus may execute a binary code provided by the compilation apparatus.

    Abstract translation: 提供了一种用于配置动态数据的方法和装置。 编译装置可以从执行二进制代码的执行装置所支持的多个数据格式中，选择执行二进制代码时的最佳性能的数据格式，并且可以生成使用所选数据格式的二进制代码 。 执行装置可以执行由编译装置提供的二进制码。

    Apparatus and method for tile binning
    9.
    发明授权
    Apparatus and method for tile binning 有权
    瓦楞纸箱装置及方法

    公开(公告)号：US09159157B2

    公开(公告)日：2015-10-13

    申请号：US13657309

    申请日：2012-10-22

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sang Oak Woo ,  Seok Yoon Jung ,  Shi Hwa Lee

    IPC: G06T15/40 ,  G06T17/00 ,  G06T15/30 ,  G06T15/00

    CPC classification number: G06T15/005

    Abstract: An apparatus and method for tile binning are provided. The tile binning apparatus may include a determination unit to determine whether a triangle obtained as a result of geometric processing includes an abnormal edge, an overlap test unit to perform an overlap test with respect to each edge of the triangle when the abnormal edge is absent from the triangle, and to sort three vertices of the triangle according to Y-axis values and perform the overlap test with respect to each edge of the triangle based on a sorting result when the triangle includes the abnormal edge, and a bin array update unit to update a bin array based on an overlap test result.

    Abstract translation: 提供了一种用于瓦片合并的装置和方法。 瓦片装箱装置可以包括：确定单元，用于确定作为几何处理的结果获得的三角形是否包括异常边缘;重叠测试单元，用于当不存在异常边缘时相对于三角形的每个边缘执行重叠测试 并且根据Y轴值对三角形的三个顶点进行排序，并且当三角形包括异常边缘时，基于排序结果，针对三角形的每个边缘执行重叠测试，并且将数组更新单元 基于重叠测试结果更新bin数组。

    CACHE MEMORY SYSTEM FOR TILE BASED RENDERING AND CACHING METHOD THEREOF
    10.
    发明申请
    CACHE MEMORY SYSTEM FOR TILE BASED RENDERING AND CACHING METHOD THEREOF 有权
    用于基于层次渲染的缓存存储器系统及其缓存方法

    公开(公告)号：US20130097386A1

    公开(公告)日：2013-04-18

    申请号：US13652894

    申请日：2012-10-16

    Applicant: SAMSUNG ELECTRONICS CO., LTD. ,  Industry-Academia Cooperation Group of Sejong University

    Inventor： Won Jong LEE ,  Sang Oak Woo ,  Seok Yoon Jung ,  Woo Chan Park ,  Young Sik Kim

    IPC: G06F12/08

    CPC classification number: G06F12/0864 ,  G06F12/126 ,  G06T1/60 ,  Y02D10/13

    Abstract: A cache memory system and a caching method for a tile-based rendering may be provided. Each of cache lines in the cache memory system may include delayed-replacement information. The delayed-replacement information may indicate whether texture data referred to at a position of an edge of a tile is included in a cache line. When a cache line corresponding to an access-requested address is absent in the cache memory system, the cache memory system may select and remove a cache line to be removed from an associative cache unit, based on delayed-replacement information.

    Abstract translation: 可以提供用于基于瓦片的呈现的高速缓冲存储器系统和缓存方法。 缓存存储器系统中的每个高速缓存行可以包括延迟替换信息。 延迟替换信息可以指示在高速缓存行中是否包括在瓦片的边缘的位置处引用的纹理数据。 当高速缓冲存储器系统中不存在对应于访问请求地址的高速缓存行时，高速缓冲存储器系统可以基于延迟替换信息来从关联高速缓存单元中选择和移除要移除的高速缓存行。

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