METHOD FOR FABRICATING SEMICONDUCTOR PACKAGE

    公开(公告)号:US20220216068A1

    公开(公告)日:2022-07-07

    申请号:US17656695

    申请日:2022-03-28

    Abstract: A method for fabricating a semiconductor package, the method including: forming a. release layer on a first carrier substrate, wherein the release layer includes a first portion and a second portion, wherein the first portion has a first thickness, and the second portion has a second thickness thicker than the first thickness; forming a barrier layer on the release layer; forming a redistribution layer on the barrier layer, wherein the redistribution layer includes wirings and an insulating layer; mounting a semiconductor chip on the redistribution layer; forming a molding layer on the redistribution layer to at least partially surround the semiconductor chip; attaching a second carrier substrate onto the molding layer; removing the first carrier substrate and the release layer; removing the barrier layer; and attaching a solder ball onto the redistribution layer exposed by removal of the barrier layer and the second portion of the release layer.

    METHOD FOR FABRICATING SEMICONDUCTOR PACKAGE

    公开(公告)号:US20210257223A1

    公开(公告)日:2021-08-19

    申请号:US17037003

    申请日:2020-09-29

    Abstract: A method for fabricating a semiconductor package, the method including: forming a release layer on a first carrier substrate, wherein the release layer includes a first portion and a second portion, wherein the first portion has a first thickness, and the second portion has a second thickness thicker than the first thickness; forming a barrier layer on the release layer; forming a redistribution layer on the barrier layer, wherein the redistribution layer includes wirings and an insulating layer; mounting a semiconductor chip on the redistribution layer; forming a molding layer on the redistribution layer to at least partially surround the semiconductor chip; attaching a second carrier substrate onto the molding layer; removing the first carrier substrate and the release layer; removing the barrier layer; and attaching a solder ball onto the redistribution layer exposed by removal of the barrier layer and the second portion of the release layer.

    SEMICONDUCTOR PACKAGE
    4.
    发明申请

    公开(公告)号:US20230068587A1

    公开(公告)日:2023-03-02

    申请号:US17853205

    申请日:2022-06-29

    Abstract: A semiconductor package including a passivation film, a mold layer on the passivation film, a connecting pad having a T shape, the T shape including a first portion and a second portion on the first portion, the first portion penetrating the passivation film, the second portion penetrating a part of the mold layer, a solder ball on the first portion of the connecting pad, an element on the second portion of the connecting pad, a wiring structure on the mold layer, the wiring structure including an insulating layer and a wiring pattern inside the insulating layer, and a semiconductor chip on the wiring structure may be provided.

    IMAGE PROCESSORS AND IMAGE PROCESSING METHODS

    公开(公告)号:US20210281753A1

    公开(公告)日:2021-09-09

    申请号:US17328147

    申请日:2021-05-24

    Abstract: Image processor circuitry includes a memory storing a program of instructions, and processing circuitry configured to execute the program of instructions to receive input data from an image sensor and detect an operation mode of the image sensor based on the input data, provide configuration data determined in association with the operation mode of the image sensor, and process image data in the input data in accordance with the operation mode and the configuration data.

    SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME

    公开(公告)号:US20210111163A1

    公开(公告)日:2021-04-15

    申请号:US16885391

    申请日:2020-05-28

    Abstract: A semiconductor package includes a first redistribution layer. A plurality of posts is disposed on the first redistribution layer. A semiconductor chip is disposed on the first redistribution layer between the plurality of posts. A second redistribution layer is formed on the plurality of posts and the semiconductor chip. A first memory stack is disposed on the second redistribution layer. A height of each of the plurality of posts extends from an upper surface of the first redistribution layer to a lower surface of the second redistribution layer.

    IMAGE PROCESSORS AND IMAGE PROCESSING METHODS

    公开(公告)号:US20200221024A1

    公开(公告)日:2020-07-09

    申请号:US16668798

    申请日:2019-10-30

    Abstract: Image processor circuitry includes a memory storing a program of instructions, and processing circuitry configured to execute the program of instructions to receive input data from an image sensor and detect an operation mode of the image sensor based on the input data, provide configuration data determined in association with the operation mode of the image sensor, and process image data in the input data in accordance with the operation mode and the configuration data.

Patent Agency Ranking