公开(公告)号：US20230060586A1

公开(公告)日：2023-03-02

申请号：US17717559

申请日：2022-04-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seok Geun AHN

IPC: H01L25/10 ,  H01L23/00 ,  H01L23/48 ,  H01L21/56 ,  H01L21/48

Abstract: Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises a package substrate, a redistribution layer on the package substrate, a vertical connection terminals that connects the package substrate to the redistribution layer, a first semiconductor chip between the package substrate and the redistribution layer, a first molding layer that fills a space between the package substrate and the redistribution layer, a second semiconductor chip on the redistribution layer, a third semiconductor chip on the second semiconductor chip, a first connection wire that directly and vertically connects the redistribution layer to a first chip pad of the third semiconductor chip, the first chip pad is beside the second semiconductor chip and on a bottom surface of the third semiconductor chip, and a second molding layer on the redistribution layer and covering the second semiconductor chip and the third semiconductor chip.

公开(公告)号：US20240055337A1

公开(公告)日：2024-02-15

申请号：US18309113

申请日：2023-04-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hwan Young CHOI ,  Seok Hyun LEE ,  Jung Min KO ,  Seok Geun AHN

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L23/535

CPC classification number: H01L23/49816 ,  H01L23/3128 ,  H01L24/29 ,  H01L24/16 ,  H01L23/535 ,  H01L2224/73265 ,  H01L2224/32225 ,  H01L2924/1431

Abstract: A semiconductor package includes a first semiconductor chip having a first top surface and an opposite first bottom surface, first pads on the first top surface, each having a first width and a first height, second pads on the first top surface further outward from a center of the first semiconductor chip, each having a second width less than the first width and a second height greater than the first height. The semiconductor package further includes a second semiconductor chip having a second bottom surface which faces the first top surface and an opposite second top surface, third pads on the second bottom surface which are connected to the first pads, and fourth pads on the second bottom surface which are connected to the second pads. The second bottom surface is convex.

公开(公告)号：US20240014117A1

公开(公告)日：2024-01-11

申请号：US18117736

申请日：2023-03-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seok Geun AHN ,  Hwanyoung Choi

IPC: H01L23/498 ,  H01L23/00 ,  H01L25/16 ,  H10B80/00

CPC classification number: H01L23/49838 ,  H01L24/32 ,  H01L25/165 ,  H01L25/162 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H10B80/00 ,  H01L2224/32225 ,  H01L2924/1434 ,  H01L2924/1431 ,  H01L2224/13147 ,  H01L2224/16235 ,  H01L2224/73253

Abstract: A semiconductor package includes a first lower redistribution layer, a first upper redistribution layer over the first lower redistribution layer, a first semiconductor chip between the first lower redistribution layer and the first upper redistribution layer, a first connection post spaced apart from the first semiconductor chip and connecting the first lower redistribution layer to the first upper redistribution layer, a first interposition layer on the first upper redistribution layer, a second interposition layer on the first interposition layer, a second lower redistribution layer on the second interposition layer, a second upper redistribution layer over the second lower redistribution layer, a second semiconductor chip between the second lower redistribution layer and the second upper redistribution layer, and a second connection post spaced apart from each other and connecting the second lower redistribution layer to the second upper redistribution layer.