Fan-out semiconductor package
    1.
    发明授权

    公开(公告)号:US11515265B2

    公开(公告)日:2022-11-29

    申请号:US16934889

    申请日:2020-07-21

    Abstract: A fan-out semiconductor package includes: a core member having a first through-hole and including a dummy metal layer; a first semiconductor chip disposed in the first through-hole and having a first active surface having first connection pads disposed thereon and a first inactive surface opposing the first active surface; a first encapsulant covering at least portions of the core member and the first semiconductor chip and filling at least portions of the first through-hole; and a first connection member disposed on the core member and the first active surface of the first semiconductor chip and including a first redistribution layer electrically connected to the first connection pads, wherein the dummy metal layer is electrically insulated from signal patterns of the first redistribution layer.

    FAN-OUT SEMICONDUCTOR PACKAGE
    2.
    发明申请

    公开(公告)号:US20200350262A1

    公开(公告)日:2020-11-05

    申请号:US16934889

    申请日:2020-07-21

    Abstract: A fan-out semiconductor package includes: a core member having a first through-hole and including a dummy metal layer; a first semiconductor chip disposed in the first through-hole and having a first active surface having first connection pads disposed thereon and a first inactive surface opposing the first active surface; a first encapsulant covering at least portions of the core member and the first semiconductor chip and filling at least portions of the first through-hole; and a first connection member disposed on the core member and the first active surface of the first semiconductor chip and including a first redistribution layer electrically connected to the first connection pads, wherein the dummy metal layer is electrically insulated from signal patterns of the first redistribution layer.

    Semiconductor package
    3.
    发明授权

    公开(公告)号:US10727212B2

    公开(公告)日:2020-07-28

    申请号:US16170469

    申请日:2018-10-25

    Abstract: A semiconductor package includes a connection structure including a first insulation layer, a second insulation layer, first and second wiring layers, and first and second connection vias. A core structure including a core member is on the first insulation layer. A first through-hole passes through the core member. Passive components are on the first insulation layer in the first through-hole and connected to the first wiring layer through the first connection via. A first encapsulant covers at least a portion of the passive components. A second through-hole passes through the core structure and the first insulation layer. A semiconductor chip is on the second insulation layer in the second through-hole and is connected to the second wiring layer through the second connection via. A second encapsulant covers at least a portion of the semiconductor chip.

    Fan-out semiconductor package
    5.
    发明授权

    公开(公告)号:US10748856B2

    公开(公告)日:2020-08-18

    申请号:US16103199

    申请日:2018-08-14

    Abstract: A fan-out semiconductor package includes: a core member having a first through-hole and including a dummy metal layer; a first semiconductor chip disposed in the first through-hole and having a first active surface having first connection pads disposed thereon and a first inactive surface opposing the first active surface; a first encapsulant covering at least portions of the core member and the first semiconductor chip and filling at least portions of the first through-hole; and a first connection member disposed on the core member and the first active surface of the first semiconductor chip and including a first redistribution layer electrically connected to the first connection pads, wherein the dummy metal layer is electrically insulated from signal patterns of the first redistribution layer.

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