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    FAN-OUT SEMICONDUCTOR PACKAGE
    1.
    发明申请
    FAN-OUT SEMICONDUCTOR PACKAGE 审中-公开

    公开(公告)号：US20200350262A1

    公开(公告)日：2020-11-05

    申请号：US16934889

    申请日：2020-07-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Seon Hee Moon ,  Myung Sam Kang ,  Jin Gu Kim

    IPC: H01L23/00 ,  H01L23/538 ,  H01L23/367 ,  H01L23/552 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

    Abstract: A fan-out semiconductor package includes: a core member having a first through-hole and including a dummy metal layer; a first semiconductor chip disposed in the first through-hole and having a first active surface having first connection pads disposed thereon and a first inactive surface opposing the first active surface; a first encapsulant covering at least portions of the core member and the first semiconductor chip and filling at least portions of the first through-hole; and a first connection member disposed on the core member and the first active surface of the first semiconductor chip and including a first redistribution layer electrically connected to the first connection pads, wherein the dummy metal layer is electrically insulated from signal patterns of the first redistribution layer.

    Semiconductor package
    2.
    发明授权
    Semiconductor package 有权

    公开(公告)号：US10727212B2

    公开(公告)日：2020-07-28

    申请号：US16170469

    申请日：2018-10-25

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Seon Hee Moon ,  Myung Sam Kang ,  Young Gwan Ko ,  Chang Bae Lee ,  Jin Su Kim

    IPC: H01L23/498 ,  H01L25/16 ,  H01L23/053 ,  H01L23/31 ,  H01L21/52 ,  H01L21/56 ,  H01L21/48 ,  H01L23/00

    Abstract: A semiconductor package includes a connection structure including a first insulation layer, a second insulation layer, first and second wiring layers, and first and second connection vias. A core structure including a core member is on the first insulation layer. A first through-hole passes through the core member. Passive components are on the first insulation layer in the first through-hole and connected to the first wiring layer through the first connection via. A first encapsulant covers at least a portion of the passive components. A second through-hole passes through the core structure and the first insulation layer. A semiconductor chip is on the second insulation layer in the second through-hole and is connected to the second wiring layer through the second connection via. A second encapsulant covers at least a portion of the semiconductor chip.

    Fan-out semiconductor package
    3.
    发明授权
    Fan-out semiconductor package 有权

    公开(公告)号：US10541221B2

    公开(公告)日：2020-01-21

    申请号：US16010754

    申请日：2018-06-18

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Yong Jin Seol ,  Myung Sam Kang ,  Young Gwan Ko

    IPC: H01L23/52 ,  H01L23/00 ,  H01L23/498 ,  H01L23/13 ,  H01L23/31

    Abstract: A fan-out semiconductor package includes a core member having a through-hole in which a semiconductor chip is disposed. The semiconductor chip has an active surface having connection pads disposed thereon and an inactive surface opposing the active surface. An encapsulant encapsulates at least a portion of the semiconductor chip. A connection member is disposed on the active surface of the semiconductor chip and includes a redistribution layer electrically connected to the connection pads of the semiconductor chip. A passivation layer is disposed on the connection member. The fan-out semiconductor package further has a slot spaced part from the through-hole and penetrating through at least a portion of the core member or the passivation layer.

    Semiconductor package and antenna module comprising the same
    4.
    发明授权
    Semiconductor package and antenna module comprising the same 有权

    公开(公告)号：US12148708B2

    公开(公告)日：2024-11-19

    申请号：US18141568

    申请日：2023-05-01

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Yong Koon Lee ,  Myung Sam Kang ,  Young Gwan Ko ,  Young Chan Ko ,  Chang Bae Lee

    IPC: H01L23/538 ,  H01L21/48 ,  H01L23/00 ,  H01L23/13 ,  H01L23/31 ,  H01L23/552 ,  H01L23/66 ,  H01L25/16 ,  H01Q1/38

    Abstract: A semiconductor package including a core structure, in which a first and second semiconductor chips and passive components are embedded, a connection structure disposed on a first side of the core structure, and including a redistribution layer electrically connected to the first and second semiconductor chips and the passive components, and a metal pattern layer and a backside wiring layer disposed on a second side of the core structure opposing the first side, and spaced apart from each other. The core structure includes a first metal layer surrounding the first semiconductor chip, a second metal layer surrounding the first semiconductor chip, and the first metal layer, a third metal layer surrounding the second semiconductor chip, and a fourth metal layer surrounding the second semiconductor chip, the passive components, and the third metal layer, and each of the first to fourth metal layers is electrically connected to the metal pattern layer.

    Semiconductor package
    5.
    发明授权
    Semiconductor package 有权

    公开(公告)号：US11842956B2

    公开(公告)日：2023-12-12

    申请号：US17355790

    申请日：2021-06-23

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Myung Sam Kang ,  Bong Ju Cho ,  Young Gwan Ko ,  Moon Il Kim

    IPC: H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065

    CPC classification number: H01L23/49827 ,  H01L23/3128 ,  H01L23/49861 ,  H01L24/13 ,  H01L25/0657

    Abstract: A method includes forming a first package structure including a first connection member including a first redistribution layer, a first frame having a first through-portion, a first semiconductor chip having a connection pad electrically connected to the first redistribution layer, and a first encapsulant covering a portion of each of the first frame and the first semiconductor chip, forming a second package structure including a second connection member including a second redistribution layer, a second semiconductor chip having a second connection pad, and a second encapsulant covering a portion of the second semiconductor chip, forming a first through-via, the first through-via electrically connecting to the second redistribution layer, and laminating the first package structure on the second package structure. After the laminating, the first through-via penetrates through the first frame, the first encapsulant, and a portion of the first connection member, and is electrically connected to the first redistribution layer.

    Fan-out semiconductor package
    8.
    发明授权
    Fan-out semiconductor package 有权

    公开(公告)号：US11515265B2

    公开(公告)日：2022-11-29

    申请号：US16934889

    申请日：2020-07-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Seon Hee Moon ,  Myung Sam Kang ,  Jin Gu Kim

    IPC: H01L21/48 ,  H01L23/00 ,  H01L23/538 ,  H01L23/367 ,  H01L23/552 ,  H01L21/56 ,  H01L23/31

    Abstract: A fan-out semiconductor package includes: a core member having a first through-hole and including a dummy metal layer; a first semiconductor chip disposed in the first through-hole and having a first active surface having first connection pads disposed thereon and a first inactive surface opposing the first active surface; a first encapsulant covering at least portions of the core member and the first semiconductor chip and filling at least portions of the first through-hole; and a first connection member disposed on the core member and the first active surface of the first semiconductor chip and including a first redistribution layer electrically connected to the first connection pads, wherein the dummy metal layer is electrically insulated from signal patterns of the first redistribution layer.

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