公开(公告)号：US10311946B2

公开(公告)日：2019-06-04

申请号：US15221875

申请日：2016-07-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Han-Wool Jeong ,  Woo-Jin Rim ,  Tae-Joong Song ,  Seong-Ook Jung ,  Gyu-Hong Kim

IPC: G11C7/18 ,  G11C11/419 ,  G11C11/4091

Abstract: The semiconductor memory device includes: a memory cell; a sensing circuit connected to the memory cell via a first bit line and a second bit line different from the first bit line, the sensing circuit configured to sense data stored in the memory cell; and a bit line voltage control circuit connected to the memory cell via the first bit line and the second bit line, the bit line voltage control circuit configured to precharge the first bit line to a first voltage that is lower than a supply voltage and to precharge the second bit line to a second voltage that is lower than the supply voltage and is different from the first voltage.

公开(公告)号：US12218669B2

公开(公告)日：2025-02-04

申请号：US18330731

申请日：2023-06-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seong-Ook Jung ,  Se Keon Kim ,  Hyunjun Kim ,  Kyeong Rim Baek ,  Keonhee Cho

IPC: H03K3/356 ,  H03K3/012 ,  H03K3/037

Abstract: A flip-flop includes an input logic circuit, a first latch, a second latch, and an output multiplexer; where the input logic circuit outputs a clock bar signal based on an input data bit and a clock signal, where the first latch and the second latch operate based on the input data bit, the clock signal, and a clock bar signal, where the output multiplexer operates based on outputs from nodes of the first and second nodes and outputs an output data bit, and where the input logic circuit has a uniform value in a period where there is no change of a value of the output data bit.