Electronic device for controlling at least one external device and operating method thereof

    公开(公告)号:US12008170B2

    公开(公告)日:2024-06-11

    申请号:US17837441

    申请日:2022-06-10

    CPC classification number: G06F3/017 G06F3/013 G06F3/016 G06F3/03547 H04R1/1041

    Abstract: Provided is an electronic device including at least one communication module comprising communication circuitry; and a processor, wherein the processor is configured to: establish a first communication connection with a first external device using the at least one communication module, receive a first signal from the first external device through the first communication connection, perform a first function of a first application corresponding to the first signal upon receiving the first signal from the first external device through the first communication connection, based on identifying that a second communication connection with a second external device using the at least one communication module is not established, and perform a second function of a second application related to the second external device corresponding to the first signal upon receiving the first signal from the first external device through the first communication connection, based on identifying that the second communication connection with the second external device using the at least one communication module is established.

    EMBEDDED MEMORY DEVICE AND OPERATING METHOD THEREOF

    公开(公告)号:US20240386946A1

    公开(公告)日:2024-11-21

    申请号:US18539411

    申请日:2023-12-14

    Abstract: An embedded memory device includes a plurality of first bit cells configured to store data and connected between a first bitline and a first complementary bitline, and at least one first cropping cell connected between the first bitline and the first complementary bitline. The at least one first cropping cell electrically connects a global bitline to the first bitline and electrically connects a complementary global bitline to the first complementary bitline in response to a first crop wordline signal. The global bitline and the complementary global bitline are implemented as an upper metal member, and the first bitline and the first complementary bitline are implemented as a lower metal member disposed below the upper metal member.

    ELECTRONIC DEVICE AND OPERATION METHOD THEREOF

    公开(公告)号:US20220197394A1

    公开(公告)日:2022-06-23

    申请号:US17457980

    申请日:2021-12-07

    Abstract: An electronic device may include a display, a communication circuit, at least one camera, a memory, and a processor operatively connected to the display, the communication circuit, the at least one camera, and the memory. The memory may store instructions that, when executed, cause the processor to provide an augmented reality (AR) environment or a virtual reality (VR) environment through the display, connect the electronic device and at least one external electronic device through the communication circuit, display the at least one external electronic device through the display, specify a first external electronic device among the displayed at least one external electronic device based on an input interface switching event, and control an operation of the electronic device in the augmented reality environment or the virtual reality environment using the specified first external electronic device.

    DEPOSITION SYSTEM AND PROCESSING SYSTEM

    公开(公告)号:US20220033962A1

    公开(公告)日:2022-02-03

    申请号:US17195900

    申请日:2021-03-09

    Abstract: A deposition system, includes: a reaction chamber; a first gas supply unit supplying a first precursor in a liquid state stored in a first main tank to the reaction chamber in a gaseous state; a reactant supply unit supplying a reactant to the reaction chamber; and an exhaust unit discharging an exhaust material, wherein the first gas supply unit includes a first sub tank, a first liquid mass flow controller, and a first vaporizer, the first precursor is supplied to the reaction chamber by passing through the first sub tank, the first liquid mass flow controller, and the first vaporizer, a first automatic refill system operates to periodically fill the first sub tank with the liquid first precursor stored in the first main tank, and the exhaust unit comprises a processing chamber, a pump, and a scrubber to which a plasma pretreatment system is applied.

    Augmented reality device and electronic device interacting with augmented reality device

    公开(公告)号:US12056416B2

    公开(公告)日:2024-08-06

    申请号:US17679700

    申请日:2022-02-24

    CPC classification number: G06F3/1454

    Abstract: An augmented reality device may comprise a display, at least one sensor, a communication circuit, and at least one processor operatively connected with the display, the at least one sensor, and the communication circuit. The at least one processor may be configured to identify a first user input specifying a shared area for outputting shared content to be output on at least one other augmented reality device, transmit information about the shared area to a server through the communication circuit, based on the first user input, identify whether the shared area and a personal area for outputting personal content overlap, based on information obtained through the at least one sensor, control the display to output the shared content in the shared area and the personal content in the personal area, based on identifying that the shared area and the personal area do not overlap, and control the display to output the shared content in the shared area and the personal content in an area not overlapping the shared area, based on identifying that the shared area and the personal area overlap.

    Dual-edge-triggered flip-flop
    9.
    发明授权

    公开(公告)号:US12218669B2

    公开(公告)日:2025-02-04

    申请号:US18330731

    申请日:2023-06-07

    Abstract: A flip-flop includes an input logic circuit, a first latch, a second latch, and an output multiplexer; where the input logic circuit outputs a clock bar signal based on an input data bit and a clock signal, where the first latch and the second latch operate based on the input data bit, the clock signal, and a clock bar signal, where the output multiplexer operates based on outputs from nodes of the first and second nodes and outputs an output data bit, and where the input logic circuit has a uniform value in a period where there is no change of a value of the output data bit.

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