SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

    公开(公告)号:US20230282512A1

    公开(公告)日:2023-09-07

    申请号:US17991090

    申请日:2022-11-21

    Abstract: A semiconductor device is provided. The semiconductor device includes: a lower line structure; an upper interlayer insulating film provided on the lower line structure and having a trench formed therein, wherein the trench includes a wiring line trench and a via trench extending from the wiring line trench to the lower line structure; and an upper line structure provided in the line trench, wherein the upper line structure includes an upper barrier film and an upper filling film. The upper filling film includes a first sub-filling film in contact with the upper interlayer insulating film, and a second sub-filling film provided on the first sub-filling film. The first sub-filling film fills an entirety of the upper via trench and covers at least a portion of a bottom surface of the upper wiring line trench.

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

    公开(公告)号:US20230020234A1

    公开(公告)日:2023-01-19

    申请号:US17947282

    申请日:2022-09-19

    Abstract: A semiconductor device includes a first interlayer insulating film disposed on a substrate and having a first trench. A first lower conductive pattern fills the first trench and includes first and second valley areas that are spaced apart from each other in a first direction parallel to an upper surface of the substrate. The first and second valley areas are recessed toward the substrate. A second interlayer insulating film is disposed on the first interlayer insulating film and includes a second trench that exposes at least a portion of the first lower conductive pattern. An upper conductive pattern fills the second trench and includes an upper barrier film and an upper filling film disposed on the upper barrier film. The upper conductive pattern at least partially fills the first valley area.

    SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THEREOF

    公开(公告)号:US20240153848A1

    公开(公告)日:2024-05-09

    申请号:US18351779

    申请日:2023-07-13

    CPC classification number: H01L23/481

    Abstract: A semiconductor device may include an upper interlayer insulating film on a lower wiring structure and an upper wiring structure in an upper wiring trench of the upper interlayer insulating film. The lower wiring structure may include a lower filling film and a lower capping film including a capping opening exposing a portion of the lower filling film. The upper wiring structure may contact the lower filling film. The upper wiring structure may include an upper liner between an upper barrier film and an upper filling film. A sidewall portion of the upper liner may include cobalt doped with ruthenium. A bottom portion of the upper liner may not include cobalt doped with ruthenium. A sidewall portion of the upper barrier film may include tantalum nitride doped with ruthenium (Ru). A sidewall portion of the upper barrier film may not be in contact with the lower capping film.

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

    公开(公告)号:US20210090999A1

    公开(公告)日:2021-03-25

    申请号:US16892649

    申请日:2020-06-04

    Abstract: A semiconductor device includes a first interlayer insulating film disposed on a substrate and having a first trench. A first lower conductive pattern fills the first trench and includes first and second valley areas that are spaced apart from each other in a first direction parallel to an upper surface of the substrate. The first and second valley areas are recessed toward the substrate. A second interlayer insulating film is disposed on the first interlayer insulating film and includes a second trench that exposes at least a portion of the first lower conductive pattern. An upper conductive pattern fills the second trench and includes an upper barrier film and an upper filling film disposed on the upper barrier film. The upper conductive pattern at least partially fills the first valley area.

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