公开(公告)号：US10468431B2

公开(公告)日：2019-11-05

申请号：US16027667

申请日：2018-07-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Ho Kim ,  BiO Kim ,  Hyung Joon Kim ,  Young Seon Son ,  Su Jin Shin ,  Jae Young Ahn ,  Ju Mi Yun ,  HanMei Choi

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/11568 ,  H01L21/28 ,  H01L29/792

Abstract: A semiconductor device includes gate electrodes vertically stacked on a substrate, and channel holes passing through the gate electrodes to extend perpendicularly to the substrate and including a gate dielectric layer and a channel area. The gate dielectric layer may be formed of a plurality of layers, and at least one layer among the plurality of layers may have different thicknesses in different locations.

公开(公告)号：US10020318B2

公开(公告)日：2018-07-10

申请号：US15218610

申请日：2016-07-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Ho Kim ,  BiO Kim ,  Hyung Joon Kim ,  Young Seon Son ,  Su Jin Shin ,  Jae Young Ahn ,  Ju Mi Yun ,  HanMei Choi

IPC: H01L29/792 ,  H01L27/11582 ,  H01L27/11565 ,  H01L27/11568

CPC classification number: H01L27/11582 ,  H01L27/11565 ,  H01L27/11568 ,  H01L29/40117 ,  H01L29/7926

Abstract: A semiconductor device includes gate electrodes vertically stacked on a substrate, and channel holes passing through the gate electrodes to extend perpendicularly to the substrate and including a gate dielectric layer and a channel area. The gate dielectric layer may be formed of a plurality of layers, and at least one layer among the plurality of layers may have different thicknesses in different locations.