公开(公告)号：US20240405782A1

公开(公告)日：2024-12-05

申请号：US18797157

申请日：2024-08-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byungwoo Koo ,  Sangpil Nam ,  Sunghan Do ,  Junsang Park ,  Jungho Lee ,  Youngjae Cho ,  Michael Choi

IPC: H03M1/66 ,  H03F3/20 ,  H04B1/00

Abstract: An apparatus configured to transmit and receive a radio frequency (RF) signal is provided. The apparatus includes a digital-to-analog converter (DAC) configured to convert a digital signal into an analog signal, a power amplifier configured to amplify the analog signal, and an antenna configured to output, as the RF signal, the amplified analog signal to the outside. The DAC includes a current cell matrix including a plurality of current cells configured to generate the analog signal, a plurality of normal paths configured to control the plurality of current cells to be turned on or off, based on the digital signal, and a plurality of alternative paths configured to selectively consume power, based on a pattern of the digital signal.

公开(公告)号：US12081227B2

公开(公告)日：2024-09-03

申请号：US17748746

申请日：2022-05-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byungwoo Koo ,  Sangpil Nam ,  Sunghan Do ,  Junsang Park ,  Jungho Lee ,  Youngjae Cho ,  Michael Choi

IPC: H03M1/66 ,  H03F3/20 ,  H04B1/00

CPC classification number: H03M1/66 ,  H03F3/20 ,  H04B1/005

Abstract: An apparatus configured to transmit and receive a radio frequency (RF) signal is provided. The apparatus includes a digital-to-analog converter (DAC) configured to convert a digital signal into an analog signal, a power amplifier configured to amplify the analog signal, and an antenna configured to output, as the RF signal, the amplified analog signal to the outside. The DAC includes a current cell matrix including a plurality of current cells configured to generate the analog signal, a plurality of normal paths configured to control the plurality of current cells to be turned on or off, based on the digital signal, and a plurality of alternative paths configured to selectively consume power, based on a pattern of the digital signal.

公开(公告)号：US20250070794A1

公开(公告)日：2025-02-27

申请号：US18802014

申请日：2024-08-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byungwoo Koo ,  Sunghan Do ,  Sangpil Nam ,  Youngjae Cho ,  Michael Choi

IPC: H03M1/68

Abstract: A digital-to-analog converter (DAC) for generating an analog output from a digital input includes a controller configured to generate a control signal based on the digital input, and a segment cell circuit including a plurality of segment cells turned on or off based on the control signal and configured to generate the analog output based on outputs of the plurality of segment cells, wherein the plurality of segment cells include a plurality of first segment cells each configured to generate an output corresponding to each of bits included in a first bit group of the digital input, a plurality of second segment cells each configured to generate an output corresponding to each of bits included in a second bit group of the digital input, and an additional segment cell configured to generate an output corresponding to a lowermost bit among the bits included in the second bit group.

公开(公告)号：US10965299B1

公开(公告)日：2021-03-30

申请号：US16887535

申请日：2020-05-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jungho Kim ,  Michael Choi ,  Byungwoo Koo ,  Hyungdong Roh ,  Sunghan Do ,  Youngjae Cho

IPC: H03M1/00 ,  H03M1/76 ,  H03M1/06 ,  G06F7/58

Abstract: A digital-to-analog converter (DAC) includes a current array having a plurality of unit cells in a plurality of rows and a plurality of columns, an arbitrary switch box and processing circuitry configured to randomly select a subset of rows among the plurality of rows based on a plurality of first row selection signals, the subset of rows including first unit cells among the plurality of unit cells, randomly select one row among the plurality of rows based on a plurality of second row selection signals, select a subset of columns among the plurality of columns based on column selection signals, second unit cells among the plurality of unit cells being included in both the one row and the subset of columns, and generate an analog output signal corresponding to a digital input signal based on the first unit cells and the second unit cells.