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公开(公告)号：US12081227B2
公开(公告)日：2024-09-03
申请号：US17748746
申请日：2022-05-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Byungwoo Koo , Sangpil Nam , Sunghan Do , Junsang Park , Jungho Lee , Youngjae Cho , Michael Choi
Abstract: An apparatus configured to transmit and receive a radio frequency (RF) signal is provided. The apparatus includes a digital-to-analog converter (DAC) configured to convert a digital signal into an analog signal, a power amplifier configured to amplify the analog signal, and an antenna configured to output, as the RF signal, the amplified analog signal to the outside. The DAC includes a current cell matrix including a plurality of current cells configured to generate the analog signal, a plurality of normal paths configured to control the plurality of current cells to be turned on or off, based on the digital signal, and a plurality of alternative paths configured to selectively consume power, based on a pattern of the digital signal.
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2.发明授权公开(公告)号：US12057844B2
公开(公告)日：2024-08-06
申请号：US18176371
申请日：2023-02-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sangheon Lee , Heewook Shin , Heejune Lee , Jungho Lee , Youngjae Cho , Michael Choi
CPC classification number: H03K5/135 , G01R19/2513 , H03K2005/00052
Abstract: A digital droop detector for detecting whether a droop occurs in a power supply voltage, may include processing circuitry configured to, detect a voltage level change of a power supply voltage in response to a clock signal, the detecting the voltage level change including converting the detected voltage level change into a first code, correct at least one nonlinearity included in the first code, the correcting including converting the first code into a second code and a target range, and adjust a delay magnitude of the clock signal based on the second code.
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公开(公告)号：US20210226643A1
公开(公告)日：2021-07-22
申请号：US17000665
申请日：2020-08-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： KYOUNGJUN MOON , Dongryeol Oh , Youngjae Cho , Michael Choi
IPC: H03M1/10
Abstract: An analog-to-digital converter includes: a voltage-current converter receiving an analog input voltage, generating a first digital signal from the analog input voltage, and outputting a residual current remaining after the first digital signal; a current-time converter converting the residual current into a current time in a time domain; and a time-digital converter receiving the residual time, and generating a second digital signal from the residual time, wherein the first digital signal and the second digital signal are sequences of digital codes representing respective signal levels of the analog input voltage.
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公开(公告)号：US11698410B2
公开(公告)日：2023-07-11
申请号：US17471763
申请日：2021-09-10
Applicant: Samsung Electronics Co., Ltd.
Inventor： Eunhye Oh , Hyochul Shin , Jinwoo Park , Sungno Lee , Younghyo Park , Yongki Lee , Heejune Lee , Youngjae Cho , Michael Choi
CPC classification number: G01R31/2884 , H03K5/24 , H03M1/124
Abstract: A test method is provided to test a semiconductor integrated circuit including an analog-to-digital converter and/or a digital-to-analog converter. An analog test signal having a test pattern is generated using an analog test signal generator or a digital test signal having the test pattern using a digital test signal generator. An analog output signal corresponding to the test pattern is generated by applying, as a digital input signal, the digital test signal having the test pattern to a digital-to-analog converter responsive to generation of the digital test signal. A digital output signal corresponding to the test pattern is generated by applying, as an analog input signal, the analog test signal having the test pattern or the analog output signal corresponding to the test pattern to an analog-to-digital converter. A normality of the semiconductor integrated circuit is determined based on the digital output signal corresponding to the test pattern.
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公开(公告)号：US20220187366A1
公开(公告)日：2022-06-16
申请号：US17465337
申请日：2021-09-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Heejune Lee , Jinwoo Park , Younghyo Park , Eunhye Oh , Sungno Lee , Youngjae Cho , Michael Choi
IPC: G01R31/317 , H03M1/10
Abstract: A semiconductor integrated circuit includes a digital-to-analog converter and a built-in self-test circuit. The digital-to-analog converter performs a normal conversion operation to generate an analog output signal by converting a digital input signal corresponding to an external digital signal that is provided from an external device outside the semiconductor integrated circuit and provide the analog output signal to the external device. The built-in self-test circuit, while the digital-to-analog converter performs the normal conversion operation, performs a real-time monitoring operation to generate a comparison alarm signal based on the digital input signal and the analog output signal such that the comparison alarm signal indicates whether the digital-to-analog converter operates normally. Performance and reliability of the digital-to-analog converter and the semiconductor integrated circuit including the digital-to-analog converter may be enhanced by monitoring in real-time abnormality of the digital-to-analog converter using the on-time monitor.
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Patent Agency Ranking
公开(公告)号：US20210281783A1
公开(公告)日：2021-09-09
申请号：US17060345
申请日：2020-10-01
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sangpil Nam , Kyunghoon Lee , Jungho Lee , Youngjae Cho , Michael Choi
IPC: H04N5/357 , H04N5/3745 , H04N5/235 , H03M1/46 , H03M1/12 , H01L27/146
Abstract: A flicker detection circuit is provided. The flicker detection circuit may include a flicker detection correlated double sampling (FD CDS) circuit including first to sixth switches turned on or off based on a control signal, and first to fourth capacitors, the FD CDS circuit being configured to receive a flicker pixel signal output from at least one pixel, summate with an output offset signal, and amplify the summation based on a gain to form a flicker detection signal; and an analog-to-digital converter (ADC) configured to quantize the flicker detection signal.
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公开(公告)号：US20250070794A1
公开(公告)日：2025-02-27
申请号：US18802014
申请日：2024-08-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Byungwoo Koo , Sunghan Do , Sangpil Nam , Youngjae Cho , Michael Choi
IPC: H03M1/68
Abstract: A digital-to-analog converter (DAC) for generating an analog output from a digital input includes a controller configured to generate a control signal based on the digital input, and a segment cell circuit including a plurality of segment cells turned on or off based on the control signal and configured to generate the analog output based on outputs of the plurality of segment cells, wherein the plurality of segment cells include a plurality of first segment cells each configured to generate an output corresponding to each of bits included in a first bit group of the digital input, a plurality of second segment cells each configured to generate an output corresponding to each of bits included in a second bit group of the digital input, and an additional segment cell configured to generate an output corresponding to a lowermost bit among the bits included in the second bit group.
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公开(公告)号：US11962295B2
公开(公告)日：2024-04-16
申请号：US17387221
申请日：2021-07-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sangheon Lee , Woongtaek Lim , Jungho Lee , Youngjae Cho , Michael Choi
IPC: H03M1/00 , H02M3/07 , H03K17/693 , H03M1/12
CPC classification number: H03K17/693 , H02M3/07 , H03M1/122
Abstract: A multiplexer includes a charging circuit; a plurality of sampling switches receiving a plurality of input signals; and a plurality of boosting circuits connected between the sampling switches and the charging circuit and sharing the charging circuit. First and second charging switches of the charging circuit are controlled by a first clock signal. Each of the boosting circuits includes a first boosting switch connected to a first node of the charging circuit and a gate of one of the sampling switches, a second boosting switch connected between a second node of the charging circuit and the one sampling switch, and a level shifter configured to control the first boosting switch and the second boosting switch in response to a second clock signal and a selection signal.
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公开(公告)号：US10965299B1
公开(公告)日：2021-03-30
申请号：US16887535
申请日：2020-05-29
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jungho Kim , Michael Choi , Byungwoo Koo , Hyungdong Roh , Sunghan Do , Youngjae Cho
Abstract: A digital-to-analog converter (DAC) includes a current array having a plurality of unit cells in a plurality of rows and a plurality of columns, an arbitrary switch box and processing circuitry configured to randomly select a subset of rows among the plurality of rows based on a plurality of first row selection signals, the subset of rows including first unit cells among the plurality of unit cells, randomly select one row among the plurality of rows based on a plurality of second row selection signals, select a subset of columns among the plurality of columns based on column selection signals, second unit cells among the plurality of unit cells being included in both the one row and the subset of columns, and generate an analog output signal corresponding to a digital input signal based on the first unit cells and the second unit cells.
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公开(公告)号：US11867757B2
公开(公告)日：2024-01-09
申请号：US17465337
申请日：2021-09-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Heejune Lee , Jinwoo Park , Younghyo Park , Eunhye Oh , Sungno Lee , Youngjae Cho , Michael Choi
IPC: G01R31/317 , H03M1/10
CPC classification number: G01R31/31725 , G01R31/31724 , H03M1/1071
Abstract: A semiconductor integrated circuit includes a digital-to-analog converter and a built-in self-test circuit. The digital-to-analog converter performs a normal conversion operation to generate an analog output signal by converting a digital input signal corresponding to an external digital signal that is provided from an external device outside the semiconductor integrated circuit and provide the analog output signal to the external device. The built-in self-test circuit, while the digital-to-analog converter performs the normal conversion operation, performs a real-time monitoring operation to generate a comparison alarm signal based on the digital input signal and the analog output signal such that the comparison alarm signal indicates whether the digital-to-analog converter operates normally. Performance and reliability of the digital-to-analog converter and the semiconductor integrated circuit including the digital-to-analog converter may be enhanced by monitoring in real-time abnormality of the digital-to-analog converter using the on-time monitor.
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