公开(公告)号：US11723189B2

公开(公告)日：2023-08-08

申请号：US17372880

申请日：2021-07-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eun Young Lee ,  Do Hyung Kim ,  Taek Jung Kim ,  Seung Jong Park ,  Jae Wha Park ,  Youn Jae Cho

IPC: H10B12/00 ,  H01L23/528 ,  H01L23/532 ,  H10N50/01 ,  H10N50/80

CPC classification number: H10B12/315 ,  H01L23/528 ,  H01L23/53266 ,  H10B12/34 ,  H10N50/01 ,  H10N50/80

Abstract: A semiconductor device and a method of fabricating a semiconductor device, the device including a substrate including an element isolation film and an active region defined by the element isolation film; a word line crossing the active region in a first direction; and a bit line structure on the substrate and connected to the active region, the bit line structure extending in a second direction crossing the first direction, wherein the bit line structure includes a first cell interconnection film including an amorphous material or ruthenium, a second cell interconnection film on and extending along the first cell interconnection film and including ruthenium, and a cell capping film on and extending along the second cell interconnection film.

公开(公告)号：US12016175B2

公开(公告)日：2024-06-18

申请号：US18226891

申请日：2023-07-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eun Young Lee ,  Do Hyung Kim ,  Taek Jung Kim ,  Seung Jong Park ,  Jae Wha Park ,  Youn Jae Cho

IPC: H10B12/00 ,  H01L23/528 ,  H01L23/532 ,  H10N50/01 ,  H10B61/00 ,  H10N50/10 ,  H10N50/80

CPC classification number: H10B12/315 ,  H01L23/528 ,  H01L23/53266 ,  H10B12/34 ,  H10B61/22 ,  H10N50/01 ,  H10N50/10 ,  H10N50/80

Abstract: A semiconductor device and a method of fabricating a semiconductor device, the device including a substrate including an element isolation film and an active region defined by the element isolation film; a word line crossing the active region in a first direction; and a bit line structure on the substrate and connected to the active region, the bit line structure extending in a second direction crossing the first direction, wherein the bit line structure includes a first cell interconnection film including an amorphous material or ruthenium, a second cell interconnection film on and extending along the first cell interconnection film and including ruthenium, and a cell capping film on and extending along the second cell interconnection film.

公开(公告)号：US11111579B2

公开(公告)日：2021-09-07

申请号：US16386970

申请日：2019-04-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sun Yong Hwang ,  Hyun Su Kim ,  Eun-Ok Lee ,  Taek Jung Kim ,  Hyo Jung Noh ,  Ji Won Yu

IPC: C23C16/40 ,  C23C16/455 ,  C23C16/44

Abstract: A deposition equipment is provided. The deposition equipment includes: a reaction chamber including an upper plate and a container body, the upper plate including a gas supplier for injecting a processing gas; a wafer chuck including an upper surface on which a wafer is loaded, in the reaction chamber, with the upper surface of the wafer chuck facing the upper plate; and a processing gas shielding section which prevents the processing gas from being adsorbed to the upper surface of the wafer chuck and is disposed between the upper plate and the wafer chuck in a state in which the wafer is removed from the wafer chuck. The processing gas shielding section includes a shutter which is plate-like, and the shutter includes a region including a gas discharge section for jetting a purging gas toward the wafer chuck.