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公开(公告)号：US09798664B2
公开(公告)日：2017-10-24
申请号：US15032867
申请日：2014-03-12
发明人： Jin-seok Lee , Tai-song Jin
IPC分类号： G06F17/50 , G06F12/0815 , G06F11/26 , G06F11/34
CPC分类号： G06F12/0815 , G06F11/261 , G06F11/3409 , G06F11/3466 , G06F11/3485 , G06F17/5022 , G06F2201/885 , G06F2212/1032
摘要： Provided method includes storing a first cache snap shot including cache profiling information regarding a cache when a first process being executed by a cycle accurate simulator is terminated; storing a second cache snap shot including the cache profiling information on the cache when a second process is executed in the cycle accurate simulator; comparing the second cache snap shot of the second process and the first cache snap shot of the first process to readjust any one value of a cache hit value and a cache miss value which are present in the second cache snap shot of the second process; and correcting the cache profiling information which is stored in the first cache snap shot of the first process by reflecting the readjusted any one value of the cache hit value and the cache miss value present in the second cache snap shot of the second process.
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2.发明授权公开(公告)号：US09535833B2
公开(公告)日：2017-01-03
申请号：US14461794
申请日：2014-08-18
发明人： Yoonseo Choi , Tai-song Jin , Donghoon Yoo
CPC分类号： G06F12/0653 , G06F9/30 , G06F9/44505 , H03M7/30
摘要： A method and apparatus for optimizing a configuration memory of a reconfigurable processor is provided. The method of optimizing the configuration memory of the reconfigurable processor includes analyzing parallelism of a loop of a program code based on an architecture of the reconfigurable processor and information regarding the configuration memory, scheduling groups of function units (FUs) to be activated in each cycle of the loop based on the analyzed parallelism, generating configuration data of each cycle, and determining a memory mapping to store the generated configuration data in the configuration memory.
摘要翻译： 提供了一种用于优化可重配置处理器的配置存储器的方法和装置。 优化可重配置处理器的配置存储器的方法包括基于可重构处理器的架构和关于配置存储器的信息来分析程序代码的循环的并行性，在每个周期中激活功能单元（FU）的调度组 基于分析的并行度生成循环，生成每个周期的配置数据，以及确定存储器映射以将生成的配置数据存储在配置存储器中。
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公开(公告)号：US09734058B2
公开(公告)日：2017-08-15
申请号：US14461718
申请日：2014-08-18
发明人： Yoonseo Choi , Tai-song Jin , Donghoon Yoo
CPC分类号： G06F12/0653 , G06F9/30 , G06F9/44505 , H03M7/30
摘要： A method and apparatus for optimizing a configuration memory of a reconfigurable processor is provided. The method of optimizing the configuration memory of the reconfigurable processor includes analyzing parallelism of a loop of a program code based on an architecture of the reconfigurable processor and information regarding the configuration memory, scheduling groups of function units (FUs) to be activated in each cycle of the loop based on the analyzed parallelism, generating configuration data of each cycle, and determining a memory mapping to store the generated configuration data in the configuration memory.
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公开(公告)号：US09697119B2
公开(公告)日：2017-07-04
申请号：US14461831
申请日：2014-08-18
发明人： Yoonseo Choi , Tai-song Jin , Donghoon Yoo
CPC分类号： G06F12/0653 , G06F9/30 , G06F9/44505 , H03M7/30
摘要： A method and apparatus for optimizing a configuration memory of a reconfigurable processor is provided. The method of optimizing the configuration memory of the reconfigurable processor includes analyzing parallelism of a loop of a program code based on an architecture of the reconfigurable processor and information regarding the configuration memory, scheduling groups of function units (FUs) to be activated in each cycle of the loop based on the analyzed parallelism, generating configuration data of each cycle, and determining a memory mapping to store the generated configuration data in the configuration memory.
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5.发明授权公开(公告)号：US09354850B2
公开(公告)日：2016-05-31
申请号：US14507272
申请日：2014-10-06
发明人： Min-wook Ahn , Won-sub Kim , Tai-song Jin , Seung-won Lee , Jin-seok Lee
IPC分类号： G06F9/45
CPC分类号： G06F8/443 , G06F8/433 , G06F8/4452
摘要： A method for scheduling loop processing of a reconfigurable processor includes generating a dependence graph of instructions for the loop processing; mapping a first register file of the reconfigurable processor on an arrow indicating inter-iteration dependence on the dependence graph; and searching for schedules of the instructions based on the mapping result.
摘要翻译： 一种用于调度可重构处理器的循环处理的方法包括：生成用于循环处理的指令的依赖图; 将可重配置处理器的第一寄存器文件映射到指示依赖图的迭代依赖性的箭头; 并根据映射结果搜索指令的时间表。
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6.发明授权公开(公告)号：US10296671B2
公开(公告)日：2019-05-21
申请号：US14521656
申请日：2014-10-23
发明人： Tai-song Jin
IPC分类号： G06F17/50
摘要： A method and apparatus for performing a simulation by using a plurality of N processors in parallel include dividing the simulation scenario into N parts to distribute a simulation scenario to each of the processors; performing a high-detail simulation by using a first processor to which a part that includes a beginning part of the divided simulation scenario is distributed, from among the N processors; performing a fast simulation by using each of N−1 processors, other than the first processor; and performing a high-detail simulation based on a snapshot that is generated after the fast simulation is finished, by using each of the N−1 processors.
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公开(公告)号：US10223269B2
公开(公告)日：2019-03-05
申请号：US15121999
申请日：2015-02-26
发明人： Won-Sub Kim , Tai-song Jin , Do-hyung Kim , Seung-won Lee
IPC分类号： G06F12/08 , G06F12/0844 , G06F13/372 , G06F13/376 , G06F13/16 , G06F9/38 , G06F9/52 , G06F9/48
摘要： A method of preventing a bank conflict in a memory includes determining processing timing of each of threads of function units to access a first memory bank in which occurrence of a bank conflict is expected, setting a variable latency of each of the threads for sequential access of the threads according to the determined processing timing, sequentially storing the threads in a data memory queue according to the determined processing timing, and performing an operation by allowing the threads stored in the data memory queue to sequentially access the first memory bank whenever the variable latency of each of the threads passes.
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公开(公告)号：US10599439B2
公开(公告)日：2020-03-24
申请号：US15125023
申请日：2015-03-11
发明人： Dong-kwan Suh , Suk-jin Kim , Do-hyung Kim , Tai-song Jin
摘要： Provided are a method and apparatus for processing a very long instruction word (VLIW) instruction. The method includes acquiring a calculation allocation instruction including information regarding whether the VLIW instructions are allocated to a plurality of slots; updating a database including the information regarding whether the VLIW instructions are allocated to the plurality of slots based on the acquired calculation allocation instruction; and allocating at least one VLIW instruction to each of the plurality of slots based on the updated database.
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公开(公告)号：US09727460B2
公开(公告)日：2017-08-08
申请号：US14296876
申请日：2014-06-05
发明人： Yoonseo Choi , Tai-song Jin , Donghoon Yoo
CPC分类号： G06F12/0653 , G06F9/30 , G06F9/44505 , H03M7/30
摘要： A method and apparatus for optimizing a configuration memory of a reconfigurable processor is provided. The method of optimizing the configuration memory of the reconfigurable processor includes analyzing parallelism of a loop of a program code based on an architecture of the reconfigurable processor and information regarding the configuration memory, scheduling groups of function units (FUs) to be activated in each cycle of the loop based on the analyzed parallelism, generating configuration data of each cycle, and determining a memory mapping to store the generated configuration data in the configuration memory.
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10.发明申请公开(公告)号：US20150100950A1
公开(公告)日：2015-04-09
申请号：US14507272
申请日：2014-10-06
发明人： Min-wook AHN , Won-sub Kim , Tai-song Jin , Seung-won Lee , Jin-seok Lee
CPC分类号： G06F8/443 , G06F8/433 , G06F8/4452
摘要： A method for scheduling loop processing of a reconfigurable processor includes generating a dependence graph of instructions for the loop processing; mapping a first register file of the reconfigurable processor on an arrow indicating inter-iteration dependence on the dependence graph; and searching for schedules of the instructions based on the mapping result.
摘要翻译： 一种用于调度可重构处理器的循环处理的方法包括：生成用于循环处理的指令的依赖图; 将可重配置处理器的第一寄存器文件映射到指示依赖图的迭代依赖性的箭头; 并根据映射结果搜索指令的时间表。
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