公开(公告)号：US20250124985A1

公开(公告)日：2025-04-17

申请号：US18988592

申请日：2024-12-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Won Hee Cho ,  Ji Sung Byun ,  Dong Eun Shin

IPC: G11C16/10 ,  G06N20/00 ,  G11C16/08 ,  G11C16/34

Abstract: A storage system includes a non-volatile memory (NVM) device, having a memory cell array, and a storage controller. The storage controller receives a write command and data from a host and controls the NVM device to write the data in the memory cell array. Additionally, the storage controller determines a memory region of the memory cell array in which the data will be written, clusters a plurality of word lines into a plurality of groups on the basis of feature information of the plurality of word lines, rearranges an access order in units of groups according to the feature information, and accesses the word lines in the rearranged order to write the data in the memory region.

公开(公告)号：US12211553B2

公开(公告)日：2025-01-28

申请号：US17939021

申请日：2022-09-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Won Hee Cho ,  Ji Sung Byun ,  Dong Eun Shin

IPC: G11C11/00 ,  G06N20/00 ,  G11C16/08 ,  G11C16/10 ,  G11C16/34

Abstract: A storage system includes a non-volatile memory (NVM) device, having a memory cell array, and a storage controller. The storage controller receives a write command and data from a host and controls the NVM device to write the data in the memory cell array. Additionally, the storage controller determines a memory region of the memory cell array in which the data will be written, clusters a plurality of word lines into a plurality of groups on the basis of feature information of the plurality of word lines, rearranges an access order in units of groups according to the feature information, and accesses the word lines in the rearranged order to write the data in the memory region.

公开(公告)号：US11887840B2

公开(公告)日：2024-01-30

申请号：US17678392

申请日：2022-02-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min Sung Kang ,  Hyoung Yol Mun ,  Jun U Jin ,  Bo Hyun Kim ,  Sung Dong Cho ,  Won Hee Cho

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L24/02 ,  H01L2224/0239 ,  H01L2224/02311 ,  H01L2224/02381 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/13171 ,  H01L2224/13172 ,  H01L2224/13184

Abstract: A semiconductor device includes a substrate. A conductive layer is disposed on the substrate and extends in a first direction. An insulating layer is disposed on the conductive layer and exposes at least a portion of the conductive layer through a via hole. The via hole includes a first face extending in a first slope relative to a top face of the conductive layer. A second face extends in a second slope relative to the top face of the conductive layer that is less than the first slope. A redistribution conductive layer includes a first pad area disposed in the via hole. A line area at least partially extends along the first face and the second face. The first face directly contacts the conductive layer. The second face is positioned at a higher level than the first face in a second direction perpendicular to a top face of the substrate.