公开(公告)号：US10303197B2

公开(公告)日：2019-05-28

申请号：US15870252

申请日：2018-01-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung-hyun Oh ,  Woo-jin Jang ,  Jong-woo Lee

IPC: G05F3/26 ,  H04B1/40 ,  A61B5/00

Abstract: A reference voltage circuit is provided. The reference voltage circuit includes a first current bias circuit including a first node; a second current bias circuit including a plurality of NMOS transistors and a second node, and an amplifier configured to output a reference voltage having same value as the second voltage. The plurality of NMOS transistors include a first NMOS transistor and a second NMOS transistor, the first NMOS transistor is connected to the first node, and the plurality of NMOS transistors are connected to the second node and configured to perform a sub-threshold operation based on a first voltage of the first node so that a second voltage is generated at the second node.

公开(公告)号：US20190025867A1

公开(公告)日：2019-01-24

申请号：US15870252

申请日：2018-01-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung-hyun Oh ,  Woo-jin Jang ,  Jong-woo Lee

IPC: G05F3/26 ,  H04B1/40 ,  A61B5/00

Abstract: A reference voltage circuit is provided. The reference voltage circuit includes a first current bias circuit including a first node; a second current bias circuit including a plurality of NMOS transistors and a second node, and an amplifier configured to output a reference voltage having same value as the second voltage. The plurality of NMOS transistors include a first NMOS transistor and a second NMOS transistor, the first NMOS transistor is connected to the first node, and the plurality of NMOS transistors are connected to the second node and configured to perform a sub-threshold operation based on a first voltage of the first node so that a second voltage is generated at the second node.

公开(公告)号：US09900020B2

公开(公告)日：2018-02-20

申请号：US15493877

申请日：2017-04-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-kwon Kim ,  Jong-woo Lee ,  Yang-hun Lee ,  Woo-jin Jang

IPC: H03M1/66 ,  H03M1/10

CPC classification number: H03M1/1014 ,  H03M1/0619 ,  H03M1/1009 ,  H03M1/66 ,  H03M1/742

Abstract: A digital/analog converter (DAC) includes a reference current generator including an internal resistor, and configured to generate reference current according to a resistance value of the internal resistor and a reference voltage, a digital gain block configured to generate a calibrated digital input signal that is obtained by adjusting a digital gain of a digital input signal based on a ratio between a reference resistance value and a resistance value of the internal resistor, and a conversion circuit configured to convert the calibrated digital input signal into an analog output signal, based on the reference current.