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公开(公告)号:US20230386542A1
公开(公告)日:2023-11-30
申请号:US18447950
申请日:2023-08-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JIN-HOON JANG , KYUNGRYUN KIM , YOUNG JU KIM , SEUNG-JUN LEE , YOUNGBIN LEE , YEONKYU CHOI
CPC classification number: G11C8/18 , G11C7/1045 , G11C7/1093 , G11C7/1066
Abstract: Disclosed is an operating method of a memory device communicating with a memory controller, which includes receiving a first command from the memory controller, the first command indicating initiation of synchronization of a data clock signal and defining a clock section corresponding to the synchronization, preparing a toggling of the data clock signal during a preparation time period, processing a first data stream based on the data clock signal toggling at a reference frequency, and processing a second data stream based on the data clock toggling at the reference frequency and extended for a period of the defined first clock section.
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公开(公告)号:US20220293154A1
公开(公告)日:2022-09-15
申请号:US17496003
申请日:2021-10-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JIN-HOON JANG , KYUNGRYUN KIM , YOUNG JU KIM , SEUNG-JUN LEE , YOUNGBIN LEE , YEONKYU CHOI
Abstract: Disclosed is an operating method of a memory device communicating with a memory controller, which includes receiving a first command from the memory controller, the first command indicating initiation of synchronization of a data clock signal and defining a clock section corresponding to the synchronization, preparing a toggling of the data clock signal during a preparation time period, processing a first data stream based on the data clock signal toggling at a reference frequency, and processing a second data stream based on the data clock toggling at the reference frequency and extended for a period of the defined first clock section.
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公开(公告)号:US20180190691A1
公开(公告)日:2018-07-05
申请号:US15647664
申请日:2017-07-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: YOUNGBIN LEE , GukHyon YON , SOOJIN HONG
IPC: H01L27/146
CPC classification number: H01L27/1463 , H01L27/14621 , H01L27/14627 , H01L27/14636 , H01L27/14645 , H01L27/14689
Abstract: A complementary metal-oxide semiconductor (CMOS) image sensor includes a device isolation layer provided in a trench of a substrate, the device isolation layer defining a pixel; and a photoelectric conversion device provided in the pixel. The device isolation layer includes a conductive layer, a tunneling layer interposed between the conductive layer and the substrate, and a trap layer interposed between the tunneling layer and the conductive layer.
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公开(公告)号:US20240329045A1
公开(公告)日:2024-10-03
申请号:US18742453
申请日:2024-06-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JIN-HOON JANG , KYUNGRYUN KIM , YOUNG JU KIM , SEUNG-JUN LEE , YOUNGBIN LEE , YEONKYU CHOI
IPC: G01N33/574 , G01N33/50
CPC classification number: G01N33/574 , G01N33/5091
Abstract: Disclosed is an operating method of a memory device communicating with a memory controller, which includes receiving a first command from the memory controller, the first command indicating initiation of synchronization of a data clock signal and defining a clock section corresponding to the synchronization, preparing a toggling of the data clock signal during a preparation time period, processing a first data stream based on the data clock signal toggling at a reference frequency, and processing a second data stream based on the data clock toggling at the reference frequency and extended for a period of the defined first clock section.
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