公开(公告)号：US20180248013A1

公开(公告)日：2018-08-30

申请号：US15444725

申请日：2017-02-28

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Murshed CHOWDHURY ,  Andrew LIN ,  James KAI ,  Yanli ZHANG ,  Johann ALSMEIER

IPC: H01L29/423 ,  H01L29/78 ,  H01L29/66 ,  H01L29/40

CPC classification number: H01L29/4236 ,  H01L21/28158 ,  H01L29/0847 ,  H01L29/1037 ,  H01L29/401 ,  H01L29/4983 ,  H01L29/6659 ,  H01L29/66621 ,  H01L29/7833 ,  H01L29/7834

Abstract: A trench having a uniform depth is provided in an upper portion of a semiconductor substrate. A continuous dielectric material layer is formed, which includes a gate dielectric that fills an entire volume of the trench. A gate electrode is formed over the gate dielectric such that the gate electrode overlies a center portion of the gate dielectric and does not overlie a first peripheral portion and a second peripheral portion of the gate dielectric that are located on opposing sides of the center portion of the gate dielectric. After formation of a dielectric gate spacer, a source extension region and a drain extension region are formed within the semiconductor substrate by doping respective portions of the semiconductor substrate.