公开(公告)号：US20220336486A1

公开(公告)日：2022-10-20

申请号：US17233799

申请日：2021-04-19

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Keigo KITAZAWA ,  Naoto NORIZUKI ,  Shunsuke TAKUMA

IPC: H01L27/11582 ,  H01L27/11556 ,  H01L27/24 ,  H01L27/11597

Abstract: A vertical repetition of a unit layer stack includes an insulating layer, a first sacrificial material layer, another insulating layer, and a second sacrificial material layer. A memory opening is formed through the vertical repetition, and a memory opening fill structure is formed in the memory opening. A backside trench is formed through the alternating stack. The first sacrificial material layers are replaced with first electrically conductive layers, and the second sacrificial material layer are replaced with second electrically conductive layers after formation of the first electrically conductive layers.

公开(公告)号：US20210159149A1

公开(公告)日：2021-05-27

申请号：US16697555

申请日：2019-11-27

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Keigo KITAZAWA

IPC: H01L23/48 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11519 ,  H01L27/11582 ,  H01L27/11524 ,  H01L27/11556

Abstract: Devices are formed on a substrate. A first-tier alternating stack of first insulating layers and first spacer material layers having first stepped surfaces and a first retro-stepped dielectric material portion are formed over the substrate. A sacrificial contact via structure is formed through the first retro-stepped dielectric material portion. A second-tier alternating stack of second insulating layers and second spacer material layers is formed with second stepped surfaces. A second retro-stepped dielectric material portion including a doped silicate glass liner and a silicate glass material portion is formed over the second stepped surfaces. Memory stack structures are formed through the second-tier alternating stack and the first-tier alternating stack. A contact via cavity is formed down to the sacrificial contact via structure. The doped silicate glass liner is recessed and the sacrificial contact via structure is removed, to form a contact via structure in the contact via cavity.

公开(公告)号：US20190273088A1

公开(公告)日：2019-09-05

申请号：US15909073

申请日：2018-03-01

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Zhixin CUI ,  Hiroshi MINAKATA ,  Keigo KITAZAWA ,  Yoshiyuki OKURA

IPC: H01L27/11556 ,  H01L27/11529 ,  H01L27/11573 ,  H01L27/11519 ,  H01L27/11565 ,  H01L29/788 ,  H01L27/11582 ,  H01L23/528

Abstract: A three-dimensional memory device includes a first-tier structure containing a first alternating stack of first insulating layers and first electrically conductive layers that has first stepped surfaces, and a first retro-stepped dielectric material portion contacting the first stepped surfaces of the first alternating stack, and a second-tier structure containing a second alternating stack of second insulating layers and second electrically conductive layers that has second stepped surfaces, and a second retro-stepped dielectric material portion contacting the second stepped surfaces of the second alternating stack. The first retro-stepped dielectric material portion has a higher etch rate than the second retro-stepped dielectric material portion. Memory stack structures vertically extend through the first alternating stack and the second alternating stack. Each of the memory stack structures includes a memory film and a vertical semiconductor channel.