公开(公告)号：US09985046B2

公开(公告)日：2018-05-29

申请号：US15180902

申请日：2016-06-13

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Zhenyu Lu ,  Jixin Yu ,  Koji Miyata ,  Makoto Yoshida ,  Johann Alsmeier ,  Hiro Kinoshita ,  Daxin Mao

IPC: H01L27/115 ,  H01L27/11582 ,  H01L21/66 ,  H01L27/11519 ,  H01L27/11565 ,  H01L27/11556 ,  H01L23/528 ,  H01L23/522 ,  H01L23/544 ,  H01L21/768 ,  H01L21/311

CPC classification number: H01L27/11582 ,  H01L21/31105 ,  H01L21/31144 ,  H01L21/76801 ,  H01L22/20 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/544 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11573 ,  H01L27/11575 ,  H01L2223/54426

Abstract: A linear mark extending perpendicular to a primary step direction of stepped terrace for a three-dimensional memory device can be employed as a reference feature for aligning a trimming material layer before initiating an etch-and-trim process sequence. The linear mark can be formed as a linear trench or a linear rail structure. The distance between a sidewall of each trimming material layer and the linear mark can be measured at multiple locations that are laterally spaced apart perpendicular to the primary step direction to provide statistically significant data points, which can be employed to provide an enhanced control of the staircase patterning process. Likewise, locations of patterned stepped surfaces can be measured at multiple locations to provide enhanced control of the locations of vertical steps in the stepped terrace.

公开(公告)号：US10658377B2

公开(公告)日：2020-05-19

申请号：US16019677

申请日：2018-06-27

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Tomohiro Kubo ,  Koji Miyata ,  Kota Funayama

IPC: H01L27/11582 ,  H01L27/1157 ,  H01L21/768 ,  H01L27/11573

Abstract: A first memory film and a sacrificial fill structure are formed within each first-tier memory opening through a first alternating stack of first insulating layers and first spacer material layers. A second alternating stack of second insulating layers and second spacer material layers is formed over the first alternating stack, and a second-tier memory opening is formed over each sacrificial fill structure. A second memory film is formed in each upper opening, and the sacrificial fill structures are removed from underneath the second-tier memory openings to form memory openings. A semiconductor channel is formed on each vertically neighboring pair of a first memory film and a second memory film as a continuous layer. The first memory film is protected by the sacrificial fill structure during formation of the second-tier memory openings.