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1.
公开(公告)号:US20220216145A1
公开(公告)日:2022-07-07
申请号:US17655827
申请日:2022-03-22
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Masanori TSUTSUMI , Naohiro HOSODA , Shuichi HAMAGUCHI , Kazuki ISOZUMI , Genta MIZUNO , Yusuke MUKAE , Ryo NAKAMURA , Yu UEDA
IPC: H01L23/522 , H01L23/532 , H01L27/1157 , H01L27/11582 , H01L27/11524 , H01L27/11556 , H01L27/11565 , H01L27/11519
Abstract: A semiconductor structure includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory openings vertically extending through the alternating stack, memory opening fill structures located in the memory openings, where each of the memory opening fill structures contains a memory film and a vertical semiconductor channel that extend vertically, and each memory film includes a crystalline blocking dielectric metal oxide layer, and a metal oxide amorphous dielectric nucleation layer located between each of the vertically neighboring electrically conductive layers and insulating layers, and located between each of the crystalline blocking dielectric metal oxide layers and each of the electrically conductive layers.
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2.
公开(公告)号:US20210159167A1
公开(公告)日:2021-05-27
申请号:US16695775
申请日:2019-11-26
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Masanori TSUTSUMI , Naohiro HOSODA , Shuichi HAMAGUCHI , Kazuki ISOZUMI , Genta MIZUNO , Yusuke MUKAE , Ryo NAKAMURA , Yu Yu UEDA
IPC: H01L23/522 , H01L23/532 , H01L27/11519 , H01L27/11524 , H01L27/11556 , H01L27/11565 , H01L27/1157 , H01L27/11582
Abstract: A semiconductor structure includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory openings vertically extending through the alternating stack, memory opening fill structures located in the memory openings, where each of the memory opening fill structures contains a memory film and a vertical semiconductor channel that extend vertically, and each memory film includes a crystalline blocking dielectric metal oxide layer, and a metal oxide amorphous dielectric nucleation layer located between each of the vertically neighboring electrically conductive layers and insulating layers, and located between each of the crystalline blocking dielectric metal oxide layers and each of the electrically conductive layers.
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