公开(公告)号：US20240306386A1

公开(公告)日：2024-09-12

申请号：US18360474

申请日：2023-07-27

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Yusuke MUKAE ,  Tatsuya HINOUE ,  Raghuveer S. MAKALA ,  Shungo ASAEDA

IPC: H10B43/27 ,  H10B41/27 ,  H10B41/35 ,  H10B43/35

CPC classification number: H10B43/27 ,  H10B41/27 ,  H10B41/35 ,  H10B43/35

Abstract: A method of forming a memory device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming memory openings through the alternating stack, forming memory opening fill structures in the memory openings including respective vertical stack of memory elements and a respective vertical semiconductor channel, forming a lateral isolation trench through the alternating stack, forming lateral recesses by removing the sacrificial material layers selective to the insulating layers and the memory opening fill structures, depositing a first tungsten layer in the lateral recesses using a first tungsten deposition process in which a fluorine-containing tungsten precursor gas is used as a reactant, and depositing a second tungsten layer on the first tungsten layer in the lateral recesses using a second tungsten deposition process in which a fluorine-free tungsten precursor gas is used as a reactant.

公开(公告)号：US20220352201A1

公开(公告)日：2022-11-03

申请号：US17523487

申请日：2021-11-10

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Tatsuya HINOUE ,  Yusuke MUKAE ,  Ryousuke ITOU ,  Masanori TSUTSUMI ,  Akio NISHIDA ,  Ramy Nashed Bassely SAID

IPC: H01L27/11582 ,  H01L27/11556

Abstract: A method of forming a three-dimensional memory device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming a memory opening extending through the alternating stack, forming a sacrificial memory opening fill structure in the memory opening, replacing the sacrificial material layers with electrically conductive layers, removing the sacrificial memory opening fill structure selective to the electrically conductive layers, and forming a memory opening fill structure the memory opening after replacing the sacrificial material layers with electrically conductive layers and after removing the sacrificial memory opening fill structure. The memory opening fill structure includes a memory film and a vertical semiconductor channel.

公开(公告)号：US20220352200A1

公开(公告)日：2022-11-03

申请号：US17523447

申请日：2021-11-10

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Michiaki SANO ,  Yusuke MUKAE ,  Naoki TAKEGUCHI ,  Yujin TERASAWA ,  Tatsuya HINOUE ,  Ramy Nashed Bassely SAID

IPC: H01L27/11582 ,  H01L27/11556

Abstract: A method of forming a three-dimensional memory device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming a memory opening extending through the alternating stack, forming a sacrificial memory opening fill structure in the memory opening, replacing the sacrificial material layers with electrically conductive layers, removing the sacrificial memory opening fill structure selective to the electrically conductive layers, and forming a memory opening fill structure the memory opening after replacing the sacrificial material layers with electrically conductive layers and after removing the sacrificial memory opening fill structure. The memory opening fill structure includes a memory film and a vertical semiconductor channel.

公开(公告)号：US20220216145A1

公开(公告)日：2022-07-07

申请号：US17655827

申请日：2022-03-22

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Masanori TSUTSUMI ,  Naohiro HOSODA ,  Shuichi HAMAGUCHI ,  Kazuki ISOZUMI ,  Genta MIZUNO ,  Yusuke MUKAE ,  Ryo NAKAMURA ,  Yu UEDA

IPC: H01L23/522 ,  H01L23/532 ,  H01L27/1157 ,  H01L27/11582 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11519

Abstract: A semiconductor structure includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory openings vertically extending through the alternating stack, memory opening fill structures located in the memory openings, where each of the memory opening fill structures contains a memory film and a vertical semiconductor channel that extend vertically, and each memory film includes a crystalline blocking dielectric metal oxide layer, and a metal oxide amorphous dielectric nucleation layer located between each of the vertically neighboring electrically conductive layers and insulating layers, and located between each of the crystalline blocking dielectric metal oxide layers and each of the electrically conductive layers.

公开(公告)号：US20190287916A1

公开(公告)日：2019-09-19

申请号：US16020008

申请日：2018-06-27

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Rahul SHARANGPANI ,  Raghuveer S. MAKALA ,  Fei ZHOU ,  Adarsh RAJASHEKHAR ,  Tatsuya HINOUE ,  Tomoyuki OBU ,  Tomohiro UNO ,  Yusuke MUKAE

IPC: H01L23/532 ,  H01L27/11556 ,  H01L27/11582 ,  H01L21/768 ,  H01L29/49

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate and memory stack structures extending through the alternating stack. Each of the electrically conductive layers includes a stack of a compositionally graded diffusion barrier and a metal fill material portion, and the compositionally graded diffusion barrier includes a substantially amorphous region contacting the interface between the compositionally graded diffusion barrier and a substantially crystalline region that is spaced from the interface by the amorphous region. The substantially crystalline region effectively blocks atomic diffusion, and the amorphous region induces formation of large grains during deposition of the metal fill material portions.

公开(公告)号：US20220352199A1

公开(公告)日：2022-11-03

申请号：US17523418

申请日：2021-11-10

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Yusuke MUKAE ,  Naoki TAKEGUCHI ,  Yujin TERASAWA ,  Tatsuya HINOUE ,  Ramy Nashed Bassely SAID

IPC: H01L27/11582 ,  H01L27/11556

Abstract: A method of forming a three-dimensional memory device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming a memory opening extending through the alternating stack, forming a sacrificial memory opening fill structure in the memory opening, replacing the sacrificial material layers with electrically conductive layers, removing the sacrificial memory opening fill structure selective to the electrically conductive layers, and forming a memory opening fill structure the memory opening after replacing the sacrificial material layers with electrically conductive layers and after removing the sacrificial memory opening fill structure. The memory opening fill structure includes a memory film and a vertical semiconductor channel.

公开(公告)号：US20210159167A1

公开(公告)日：2021-05-27

申请号：US16695775

申请日：2019-11-26

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Masanori TSUTSUMI ,  Naohiro HOSODA ,  Shuichi HAMAGUCHI ,  Kazuki ISOZUMI ,  Genta MIZUNO ,  Yusuke MUKAE ,  Ryo NAKAMURA ,  Yu Yu UEDA

IPC: H01L23/522 ,  H01L23/532 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11582

Abstract: A semiconductor structure includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory openings vertically extending through the alternating stack, memory opening fill structures located in the memory openings, where each of the memory opening fill structures contains a memory film and a vertical semiconductor channel that extend vertically, and each memory film includes a crystalline blocking dielectric metal oxide layer, and a metal oxide amorphous dielectric nucleation layer located between each of the vertically neighboring electrically conductive layers and insulating layers, and located between each of the crystalline blocking dielectric metal oxide layers and each of the electrically conductive layers.

公开(公告)号：US20190287982A1

公开(公告)日：2019-09-19

申请号：US16020088

申请日：2018-06-27

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Tatsuya HINOUE ,  Tomoyuki OBU ,  Tomohiro UNO ,  Yusuke MUKAE ,  Rahul SHARANGPANI ,  Raghuveer S. MAKALA ,  Fei ZHOU ,  Adarsh RAJASHEKHAR

IPC: H01L27/11556 ,  H01L27/11582 ,  H01L27/11524 ,  H01L27/1157 ,  H01L27/11529 ,  H01L27/11573

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate and memory stack structures extending through the alternating stack. Each of the electrically conductive layers includes a stack of a compositionally graded diffusion barrier and a metal fill material portion, and the compositionally graded diffusion barrier includes a substantially amorphous region contacting the interface between the compositionally graded diffusion barrier and a substantially crystalline region that is spaced from the interface by the amorphous region. The substantially crystalline region effectively blocks atomic diffusion, and the amorphous region induces formation of large grains during deposition of the metal fill material portions.

公开(公告)号：US20230128441A1

公开(公告)日：2023-04-27

申请号：US17507224

申请日：2021-10-21

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Masanori TSUTSUMI ,  Yusuke MUKAE ,  Tatsuya HINOUE ,  Yuki KASAI

IPC: H01L27/11582 ,  H01L27/11556 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/1157 ,  H01L27/11565 ,  G11C16/04

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, and memory stack structures extending through the alternating stack. Each of the memory stack structures includes a vertical semiconductor channel, a tunneling dielectric layer, a vertical stack of discrete silicon nitride memory elements located at levels of the electrically conductive layers, and a vertical stack of discrete silicon oxide blocking dielectric structures laterally surrounding the vertical stack of discrete silicon nitride memory elements. Each of the silicon oxide blocking dielectric structures includes a silicon oxynitride surface region, and an atomic concentration of nitrogen atoms within the silicon oxynitride surface region decreases with a lateral distance from an interface between the silicon oxynitride surface region and a respective one of the silicon nitride memory elements.

公开(公告)号：US20190280001A1

公开(公告)日：2019-09-12

申请号：US16002265

申请日：2018-06-07

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Yujin TERASAWA ,  Genta MIZUNO ,  Yusuke MUKAE ,  Yoshinobu TANAKA ,  Shiori KATAOKA ,  Ryosuke ITOU ,  Kensuke YAMAGUCHI ,  Naoki TAKEGUCHI

IPC: H01L27/11582 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/1157 ,  H01L27/11573 ,  H01L23/522 ,  H01L23/528 ,  H01L21/768

Abstract: An alternating stack of insulating layers and sacrificial material layers is formed with stepped surfaces. Sacrificial metal plates are formed on the top surfaces of the sacrificial material layers, and a retro-stepped dielectric material portion is formed over the sacrificial metal plates. Contact via cavities are formed through the retro-stepped dielectric material portion employing the sacrificial metal plates as etch stop structures. The sacrificial metal plates are replaced with portions of insulating spacer layers. Sacrificial via fill structures within remaining volumes of the contact via cavities. The sacrificial material layers are replaced with electrically conductive layers. The sacrificial via fill structures are replaced with portions of staircase-region contact via structures that contact the electrically conductive layers.