公开(公告)号：US10319639B2

公开(公告)日：2019-06-11

申请号：US15679664

申请日：2017-08-17

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Shutesh Krishnan ,  Sw Wang ,  CH Chew ,  How Kiat Liew ,  Fui Fui Tan

IPC: H01L21/78 ,  H01L21/00 ,  H01L21/306 ,  H01L23/482

Abstract: Implementations of a method of forming a semiconductor package may include forming a plurality of notches into a first side of a wafer, the first side of the wafer including a plurality of electrical contacts. The method may also include coating the first side of the wafer and an interior of the plurality of notches with a molding compound, grinding a second side of the wafer to thin the wafer to a desired thickness, forming a back metal on a second side of the wafer, exposing the plurality of electrical contacts through grinding a first side of the molding compound, and singulating the wafer at the plurality of notches to form a plurality of semiconductor packages.

公开(公告)号：US11942369B2

公开(公告)日：2024-03-26

申请号：US16942916

申请日：2020-07-30

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Shutesh Krishnan ,  Sw Wei Wang ,  Ch Chew ,  How Kiat Liew ,  Fui Fui Tan

IPC: H01L21/768 ,  H01L21/306 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/482 ,  H01L23/495 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L25/065 ,  H01L29/06

CPC classification number: H01L21/78 ,  H01L21/306 ,  H01L21/56 ,  H01L21/561 ,  H01L23/3114 ,  H01L23/482 ,  H01L29/0657

Abstract: Implementations of a method of forming a semiconductor package may include forming a plurality of notches into a first side of a wafer, the first side of the wafer including a plurality of electrical contacts. The method may also include coating the first side of the wafer and an interior of the plurality of notches with a molding compound, grinding a second side of the wafer to thin the wafer to a desired thickness, forming a back metal on a second side of the wafer, exposing the plurality of electrical contacts through grinding a first side of the molding compound, and singulating the wafer at the plurality of notches to form a plurality of semiconductor packages.

公开(公告)号：US10763173B2

公开(公告)日：2020-09-01

申请号：US16395822

申请日：2019-04-26

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Shutesh Krishnan ,  Sw Wei Wang ,  Ch Chew ,  How Kiat Liew ,  Fui Fui Tan

IPC: H01L21/78 ,  H01L21/00 ,  H01L21/306 ,  H01L23/482 ,  H01L21/56 ,  H01L23/31 ,  H01L29/06

Abstract: Implementations of a method of forming a semiconductor package may include forming a plurality of notches into a first side of a wafer, the first side of the wafer including a plurality of electrical contacts. The method may also include coating the first side of the wafer and an interior of the plurality of notches with a molding compound, grinding a second side of the wafer to thin the wafer to a desired thickness, forming a back metal on a second side of the wafer, exposing the plurality of electrical contacts through grinding a first side of the molding compound, and singulating the wafer at the plurality of notches to form a plurality of semiconductor packages.