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公开(公告)号:US11244918B2
公开(公告)日:2022-02-08
申请号:US15679666
申请日:2017-08-17
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Sw Wang , CH Chew , Eiji Kurose , How Kiat Liew
Abstract: Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side; one or more bumps included on the first side of the wafer, the bumps comprising a first layer having a first metal and a second layer including a second metal. The first layer may have a first thickness and the second layer may have a second thickness. The semiconductor package may also have a mold compound encapsulating all the semiconductor die except for a face of the one or more bumps.
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公开(公告)号:US20190115275A1
公开(公告)日:2019-04-18
申请号:US15783533
申请日:2017-10-13
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Atapol PRAJUCKAMOL , CH Chew , Yushuang YAO
Abstract: Implementations of semiconductor packages may include: a substrate comprising a first side and a second side and a hole in the substrate. The hole extending from the first side to the second side of the substrate and positioned in a center of the substrate. The semiconductor packages may also include a bushing around the hole to the first side of the substrate. The semiconductor packages may also include a plurality of pin holders arranged and coupled on the substrate. The semiconductor package may also include a molding compound at least partially encapsulating the substrate, encapsulating a side surface of the bushing, and encapsulating a plurality of side surfaces of the plurality of pin holders.
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公开(公告)号:US10319639B2
公开(公告)日:2019-06-11
申请号:US15679664
申请日:2017-08-17
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Shutesh Krishnan , Sw Wang , CH Chew , How Kiat Liew , Fui Fui Tan
IPC: H01L21/78 , H01L21/00 , H01L21/306 , H01L23/482
Abstract: Implementations of a method of forming a semiconductor package may include forming a plurality of notches into a first side of a wafer, the first side of the wafer including a plurality of electrical contacts. The method may also include coating the first side of the wafer and an interior of the plurality of notches with a molding compound, grinding a second side of the wafer to thin the wafer to a desired thickness, forming a back metal on a second side of the wafer, exposing the plurality of electrical contacts through grinding a first side of the molding compound, and singulating the wafer at the plurality of notches to form a plurality of semiconductor packages.
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