公开(公告)号：US20180096849A1

公开(公告)日：2018-04-05

申请号：US15708447

申请日：2017-09-19

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Peter A. BURKE ,  James KIMBALL ,  Gordon M. GRIVNA

IPC: H01L21/28 ,  H01L21/265 ,  H01L21/02 ,  H01L21/306 ,  H01L29/423 ,  H01L29/40 ,  H01L29/788 ,  H01L29/66

CPC classification number: H01L21/28114 ,  H01L21/02236 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/26506 ,  H01L21/26533 ,  H01L21/2658 ,  H01L21/26586 ,  H01L21/30604 ,  H01L29/407 ,  H01L29/417 ,  H01L29/42336 ,  H01L29/4236 ,  H01L29/66348 ,  H01L29/66825 ,  H01L29/7397 ,  H01L29/7889

Abstract: A process of forming electronic device can include providing a substrate having a first portion and a second portion; introducing a nitrogen-containing species into the second portion of the substrate; and exposing the substrate to an oxidizing ambient, wherein a thicker oxide is grown from the first portion as compared to the second portion. In an embodiment, the process can include removing the first portion while the second portion of the substrate that includes the nitrogen-containing species remains. In another embodiment, the process can be used to form different thicknesses of an oxide layer at different portions along a sidewall of a trench. The process may be used in other applications where different thicknesses of oxide layers are to be formed during the same oxidation cycle, such as forming a tunnel dielectric layer and a gate dielectric layer for a floating gate memory cell.