公开(公告)号：US11581223B2

公开(公告)日：2023-02-14

申请号：US17216167

申请日：2021-03-29

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Michael J. Seddon

IPC分类号： H01L21/78 ,  H01L21/32 ,  H01L21/268 ,  H01L21/3205 ,  H01L21/3213 ,  H01L23/544 ,  H01L21/66 ,  H01L21/027

摘要： Implementations of methods of singulating a plurality of die included in a substrate may include forming a plurality of die on a first side of a substrate, forming a backside metal layer on a second side of a substrate, applying a photoresist layer over the backside metal layer, patterning the photoresist layer along a die street of the substrate, and etching through the backside metal layer located in the die street of the substrate. The substrate may be exposed through the etch. The method may also include singulating the plurality of die included in the substrate through removing a substrate material in the die street.

公开(公告)号：US11508579B2

公开(公告)日：2022-11-22

申请号：US17134717

申请日：2020-12-28

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Takashi Noma ,  Michael J. Seddon

IPC分类号： H01L21/78 ,  H01L21/027 ,  H01L21/311 ,  H01L21/3213

摘要： Implementations of die singulation systems and related methods may include forming a plurality of die on a first side of a substrate, forming a backside metal layer on a second side of a substrate, applying a photoresist layer over the backside metal layer, patterning the photoresist layer along a die street of the substrate, and forming a groove at the pattern of the photoresist layer only partially through a thickness of the backside metal layer. The groove may be located in the die street of the substrate. The method may also include etching through a remaining portion of the backside metal layer located in the die street, removing the photoresist layer, and singulating the plurality of die included in the substrate by removing substrate material in the die street.

公开(公告)号：US11387130B2

公开(公告)日：2022-07-12

申请号：US16505949

申请日：2019-07-09

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Michael J. Seddon ,  Takashi Noma

IPC分类号： H01L21/68 ,  H01L21/768 ,  H01L21/78 ,  H01L23/544

摘要： Implementations of a method of making a plurality of alignment marks on a wafer may include: providing a wafer including an alignment feature on a first side of the wafer. The method may include aligning the wafer using a camera focused on the first side of the wafer. The wafer may be aligned using the alignment feature on the first side of the die. The wafer may also include creating a plurality of alignment marks on a second side of the wafer through lasering, sawing, or scribing.

公开(公告)号：US11361970B2

公开(公告)日：2022-06-14

申请号：US16861810

申请日：2020-04-29

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Michael J. Seddon ,  Francis J. Carney ,  Eiji Kurose ,  Chee Hiong Chew ,  Soon Wei Wang

IPC分类号： H01L23/00 ,  H01L21/302 ,  H01L21/56 ,  H01L21/78 ,  H01L23/12 ,  H01L21/48 ,  H01L23/31

摘要： Implementations of a silicon-in-insulator (SOI) semiconductor die may include a first largest planar surface, a second largest planar surface and a thickness between the first largest planar surface and the second largest planar surface; and one of a permanent die support structure, a temporary die support structure, or any combination thereof coupled to one of the first largest planar surface, the second largest planar surface, the thickness, or any combination thereof. The first largest planar surface, the second largest planar surface, and the thickness may be included through a silicon layer coupled to a insulative layer.

公开(公告)号：US11342189B2

公开(公告)日：2022-05-24

申请号：US16985995

申请日：2020-08-05

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Michael J. Seddon ,  Francis J. Carney ,  Chee Hiong Chew ,  Soon Wei Wang ,  Eiji Kurose

IPC分类号： H01L21/302 ,  H01L21/56 ,  H01L23/31 ,  H01L21/48 ,  H01L23/00 ,  H01L21/78 ,  H01L23/12

摘要： Implementations of a method of forming a semiconductor package may include forming a plurality of notches into the first side of a semiconductor substrate; forming an organic material over the first side of the semiconductor substrate and into the plurality of notches; forming a cavity into each of a plurality of semiconductor die included in the semiconductor substrate; applying a backmetal into the cavity in each of the plurality of semiconductor die included in the semiconductor substrate; and singulating the semiconductor substrate through the organic material into a plurality of semiconductor packages.

公开(公告)号：US11289381B2

公开(公告)日：2022-03-29

申请号：US17068129

申请日：2020-10-12

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Michael J. Seddon ,  Takashi Noma

IPC分类号： H01L21/78 ,  H01L21/66 ,  H01L21/3205 ,  H01L21/683 ,  H01L21/02 ,  H01L21/304

摘要： Implementations of a method for aligning a semiconductor wafer for singulation may include: providing a semiconductor wafer having a first side and a second side. The first side of the wafer may include a plurality of die and the plurality of die may be separated by streets. The semiconductor wafer may include an edge ring around a perimeter of the wafer on the second side of the wafer. The wafer may also include a metal layer on the second side of the wafer. The metal layer may substantially cover the edge ring. The method may include grinding the edge ring to create an edge exclusion area and aligning the semiconductor wafer with a saw using a camera positioned in the edge exclusion area on the second side of the wafer. Aligning the wafer may include using three or more alignment features included in the edge exclusion area.

公开(公告)号：US11164835B2

公开(公告)日：2021-11-02

申请号：US15871586

申请日：2018-01-15

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Michael J. Seddon ,  Takashi Noma ,  Kazuhiro Saito

IPC分类号： H01L23/00 ,  H01L21/48 ,  B23K3/06

摘要： A semiconductor wafer has an edge support ring around a perimeter of the semiconductor wafer and conductive layer formed over a surface of the semiconductor wafer within the edge support ring. A first stencil is disposed over the edge support ring with first openings aligned with the conductive layer. The first stencil includes a horizontal portion over the edge support ring, and a step-down portion extending the first openings to the conductive layer formed over the surface of the semiconductor wafer. The horizontal portion may have a notch with the edge support ring disposed within the notch. A plurality of bumps is dispersed over the first stencil to occupy the first openings over the conductive layer. A second stencil is disposed over the edge support ring with second openings aligned with the conductive layer to deposit a flux material in the second openings over the conductive layer.

公开(公告)号：US11114402B2

公开(公告)日：2021-09-07

申请号：US15903677

申请日：2018-02-23

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Michael J. Seddon ,  Takashi Noma ,  Kazuo Okada ,  Hideaki Yoshimi ,  Naoyuki Yomoda ,  Yusheng Lin

IPC分类号： H01L23/00 ,  H01L21/78 ,  H01L23/498

摘要： Implementations of semiconductor devices may include a die having a first side and a second side, a contact pad coupled to the first side of the die, and a metal layer coupled to the second side of the die. A thickness of the die may be no more than four times a thickness of the metal layer.

公开(公告)号：US11114329B2

公开(公告)日：2021-09-07

申请号：US16734540

申请日：2020-01-06

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Michael J. Seddon ,  Heng Chen Lee

IPC分类号： H01L21/687 ,  H01L21/677 ,  H01L21/683 ,  H01L21/68 ,  H01L21/02

摘要： Implementations of methods of loading an evaporator may include, using a robotic arm, removing a substrate from a cassette and centering the substrate on a substrate aligner. The method may include aligning the substrate using the substrate aligner. The substrate may also include removing the substrate from the substrate aligner using the robotic arm and loading the substrate into a first available pocket of a planet of an evaporator using the robotic arm. The method may also include rotating the planet to a second available pocket after detecting a presence of the substrate in the first available pocket.

公开(公告)号：US11075129B2

公开(公告)日：2021-07-27

申请号：US16656140

申请日：2019-10-17

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Michael J. Seddon

IPC分类号： H01L23/58 ,  H01L29/10 ,  H01L21/66 ,  H01L21/683 ,  G01R31/28 ,  H01L21/78 ,  H01L21/304

摘要： Implementations of a substrate carrier may include: a top ring configured to enclose an edge of a first side of a substrate; and a bottom support configured to enclose an entire second side and an edge of the second side of the substrate.