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    Wiring board
    2.
    发明授权
    Wiring board 有权

    公开(公告)号：US11716810B2

    公开(公告)日：2023-08-01

    申请号：US17660700

    申请日：2022-04-26

    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

    Inventor： Masaya Takizawa ,  Rie Mizutani ,  Hiroshi Taneda ,  Yoshiki Akiyama ,  Noriyoshi Shimizu

    IPC: H05K1/02 ,  H05K1/11

    CPC classification number: H05K1/113 ,  H05K1/0271 ,  H05K2201/0212 ,  H05K2201/068

    Abstract: A wiring board includes a first interconnect structure including a first interconnect layer, and a first insulating layer including a non-photosensitive thermosetting resin as a main component thereof, a second interconnect structure including second interconnect layers, and second insulating layers including a photosensitive resin as a main component thereof, and laminated on the first interconnect structure, and an encapsulating resin layer including a non-photosensitive thermosetting resin as a main component thereof, and laminated on an uppermost second insulating layer. An uppermost second interconnect layer includes a pad protruding from the uppermost second insulating layer. The encapsulating resin layer exposes a top surface of the pad, and covers at least a portion of a side surface of the pad. Thermal expansion coefficients of the first insulating layer and the encapsulating resin layer are lower than that of the second insulating layers.

    WIRING BOARD, SEMICONDUCTOR DEVICE, AND WIRING BOARD MANUFACTURING METHOD
    3.
    发明申请
    WIRING BOARD, SEMICONDUCTOR DEVICE, AND WIRING BOARD MANUFACTURING METHOD 有权

    公开(公告)号：US20240404978A1

    公开(公告)日：2024-12-05

    申请号：US18671520

    申请日：2024-05-22

    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

    Inventor： Masaya Takizawa

    IPC: H01L23/00 ,  H01L21/48 ,  H01L23/498 ,  H05K1/11

    Abstract: A wiring board includes an insulating layer, a connection terminal, and a wiring structure. The insulating layer includes a first surface and a second surface on an opposite side of the first surface, and includes an opening portion that is formed so as to penetrate through the first surface and the second surface. The connection terminal is arranged in the opening portion. The wiring structure is connected to the connection terminal. The connection terminal includes a pad that is formed in the opening portion and that has a bottom surface located on a same plane as the second surface of the insulating layer, and a surface treatment layer that covers the pad. The pad protrudes from the first surface of the insulating layer, and the surface treatment layer forms a gap between the surface treatment layer and an inner wall surface of the opening portion.

    Interconnect substrate
    4.
    发明授权
    Interconnect substrate 有权

    公开(公告)号：US11792927B2

    公开(公告)日：2023-10-17

    申请号：US17817446

    申请日：2022-08-04

    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

    Inventor： Rie Mizutani ,  Noriyoshi Shimizu ,  Hiroshi Taneda ,  Masaya Takizawa ,  Yoshiki Akiyama

    IPC: H05K1/11 ,  H05K1/03 ,  H05K3/46

    CPC classification number: H05K1/113 ,  H05K1/0366 ,  H05K3/4644 ,  H05K2201/0212 ,  H05K2201/068 ,  H05K2201/09136

    Abstract: An interconnect substrate includes a core layer including a resin layer mainly composed of a non-photosensitive thermosetting resin and a through interconnect extending through the resin layer, the core layer having no reinforcement member contained therein, a first interconnect structure laminated on a first side of the core layer and including first interconnect layers and first insulating layers mainly composed of a photosensitive resin, and a second interconnect structure laminated on a second side of the core layer and including second interconnect layers and a single second insulating layer mainly composed of a photosensitive resin, wherein the first interconnect layers are electrically connected to the second interconnect layers via the through interconnect, wherein the core layer has greater rigidity than the first interconnect structure and the second interconnect structure, and wherein a thickness of the second interconnect structure is greater than a thickness of each of the first insulating layer.

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