公开(公告)号：US20240296900A1

公开(公告)日：2024-09-05

申请号：US18511992

申请日：2023-11-16

申请人： SILICON MOTION, INC.

发明人： Hsu-Ping OU ,  Chun-Ho TUNG

IPC分类号： G11C29/50 ,  G06K19/077

CPC分类号： G11C29/50004 ,  G06K19/07732 ,  G11C2029/5004

摘要： Disclosed is a memory device with dual interface, test method and test system thereof. An initialization procedure is executed by the memory device with dual interface in a PCIe mode. A voltage level of a pin of the memory device with dual interface is altered according to the initialization procedure, wherein the pin of the memory device with dual interface operates in a SD mode but not in PCIe mode. The voltage level of the pin of the memory device with dual interface is switched between a high voltage level and a low voltage level at a first frequency during a test stage of the initialization procedure. The voltage level of the pin of the memory device with dual interface is kept at the high voltage level or the low voltage level during a result display stage of the initialization procedure.

公开(公告)号：US20240053928A1

公开(公告)日：2024-02-15

申请号：US18361150

申请日：2023-07-28

申请人： Silicon Motion, Inc.

发明人： Hsu-Ping OU ,  Kuang-Ting TAI

IPC分类号： G06F3/06

CPC分类号： G06F3/0659 ,  G06F3/0604 ,  G06F3/0679

摘要： A technique for signal deskew at the non-volatile memory side. The non-volatile memory includes a plurality of dies and a signal timing adjustment circuit. The dies are grouped into storage zones. A controller is coupled to the non-volatile memory through a plurality of data lines. Through the data lines, the controller issues a plurality of commands to provide zone delay parameters to the non-volatile memory to drive the signal timing adjustment circuit at the non-volatile memory side to separately adjust data-line timing of the different storage zones.

公开(公告)号：US20220405215A1

公开(公告)日：2022-12-22

申请号：US17463542

申请日：2021-08-31

申请人： SILICON MOTION, INC.

发明人： Hsu-Ping OU ,  Tsu-Han LU

IPC分类号： G06F13/16 ,  G06F13/40 ,  G06F12/02 ,  G06F12/0882

摘要： Disclosed is a method for accessing data from a flash memory. The method comprises a flash memory controller receiving an access command from a host device, according to the access command, the flash memory accessing a plurality of data from the data pages of a plurality of blocks in the flash memory simultaneously and simultaneously temporarily storing the accessed data to the plurality of buffers of the flash memory, and simultaneously temporarily storing the data in the plurality of buffers of the flash memory buffer to the plurality of buffers the flash memory controller.

公开(公告)号：US20170075624A1

公开(公告)日：2017-03-16

申请号：US15097785

申请日：2016-04-13

申请人： Silicon Motion, Inc.

发明人： Hsu-Ping OU ,  Chih-Kang KUNG

IPC分类号： G06F3/06

CPC分类号： G06F3/0647 ,  G06F3/0613 ,  G06F3/0619 ,  G06F3/0656 ,  G06F3/0679 ,  G06F3/0688

摘要： A method for moving data internally, performed by a processing unit, including at least the following steps. The processing unit transmits partial copyback read commands to a storage sub-unit through an access interface, where each partial copyback read command is used to direct logic circuits of the storage sub-unit to store partial data of a page of the storage sub-unit in a designated location of a data buffer of the storage sub-unit. The processing unit further transmits a copyback write command to the storage sub-unit through the storage sub-unit for programming the data of the data buffer in a new page of the storage sub-unit.

摘要翻译： 一种用于在内部移动数据的方法，由处理单元进行，至少包括以下步骤。 处理单元通过访问接口向存储子单元发送部分回读读取命令，其中每个部分副本读命令用于指示存储子单元的逻辑电路以存储存储子单元的页的部分数据 在存储子单元的数据缓冲器的指定位置。 处理单元还通过存储子单元向存储子单元发送回写写入命令，用于对存储子单元的新页面中的数据缓冲器的数据进行编程。

公开(公告)号：US20140136929A1

公开(公告)日：2014-05-15

申请号：US13947979

申请日：2013-07-22

申请人： Silicon Motion, Inc.

发明人： Cheng-Wei LIU ,  Hsu-Ping OU

IPC分类号： G06F11/10

CPC分类号： G06F11/1048

摘要： A storage medium receiving write data provided by a host device, providing read data to the host and including a first module and a second module is disclosed. The first module includes a first memory cell and a first controller. The first memory cell stores the write data. The first controller reads the first memory cell to generate a first accessing result. The second module includes a second memory cell and a second controller. The second memory cell stores the write data. The second controller reads the second memory cell. When the first accessing result has an error and the error cannot be corrected by the first controller, the first controller requests the second controller to read the second memory cell to generate a second accessing result, and the second controller serves the second accessing result as the read data and provides the read data to the host.

摘要翻译： 接收由主机设备提供的写数据的存储介质，向主机提供读数据并且包括第一模块和第二模块。 第一模块包括第一存储单元和第一控制器。 第一个存储单元存储写入数据。 第一控制器读取第一存储器单元以产生第一访问结果。 第二模块包括第二存储单元和第二控制器。 第二存储单元存储写入数据。 第二控制器读取第二存储单元。 当第一访问结果具有错误并且第一控制器不能纠正错误时，第一控制器请求第二控制器读取第二存储器单元以产生第二访问结果，并且第二控制器将第二访问结果作为 读取数据并将读取的数据提供给主机。

公开(公告)号：US20240053929A1

公开(公告)日：2024-02-15

申请号：US18364542

申请日：2023-08-03

申请人： Silicon Motion, Inc.

发明人： Hsu-Ping OU ,  Chien-Hung LEE

IPC分类号： G06F3/06

CPC分类号： G06F3/0659 ,  G06F3/0604 ,  G06F3/0679

摘要： A technique for accurate communication between a non-volatile memory and its controller. The controller accesses a storage area of the non-volatile memory through data lines, wherein the controller transmits a command through the data lines to access the storage area of the non-volatile memory. The command is further returned from the non-volatile memory to the controller through the data lines for comparison, to determine whether the command is correctly received by the non-volatile memory.