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公开(公告)号:US20220317931A1
公开(公告)日:2022-10-06
申请号:US17461381
申请日:2021-08-30
Applicant: SK hynix Inc.
Inventor: Ji Hoon LEE
IPC: G06F3/06
Abstract: A memory system includes a plurality of memory groups capable of performing a data input/output operation, and a controller configured to divide an operation subject to a data input/output command into at least one unit operation corresponding to the plurality of memory groups, and assign the at least one unit operation to plural queues corresponding to the respective memory groups, based on first information regarding operation statuses of the plurality of memory groups and second information regarding available resources.
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公开(公告)号:US20220100405A1
公开(公告)日:2022-03-31
申请号:US17204317
申请日:2021-03-17
Applicant: Sk hynix Inc.
Inventor: Ji Hoon LEE , Woo Young YANG
IPC: G06F3/06
Abstract: There are provided a memory controller and an operating method thereof. The memory controller includes: a meta data storage for storing meta data including mapping information of data stored in a memory device and valid data information representing whether the data stored in the memory device is valid data; and a migration controller for controlling the memory device to perform a migration operation of moving, to a target memory block, valid data stored in a plurality of source memory blocks included in the memory device, based on the meta data. The migration controller controls the memory device to read a second valid data stored in the second die before reading a first valid data stored in the first die, based on a comparison result between a reference time and a delay time required until before the first valid data is read.
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公开(公告)号:US20220057953A1
公开(公告)日:2022-02-24
申请号:US17183899
申请日:2021-02-24
Applicant: SK HYNIX Inc.
Inventor: Ji Hoon LEE
IPC: G06F3/06
Abstract: A memory controller includes a meta data memory configured to store mapping information of data stored in a plurality of memory blocks included in a memory device and valid data information indicating whether the data stored in the plurality of memory blocks is valid data, and a migration controller configured to control the memory device to perform a migration operation of moving a plurality of valid data stored in a source memory block among the plurality of memory blocks from the source memory block to a target memory block based on the mapping information and the valid data information.
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公开(公告)号:US20220254432A1
公开(公告)日:2022-08-11
申请号:US17376391
申请日:2021-07-15
Applicant: SK hynix Inc.
Inventor: Jin Pyo KIM , Ji Hoon LEE
Abstract: Embodiments of the present disclosure relate to a memory system and an operating method of the memory system. According to embodiments of the present disclosure, a memory system may include a main core for executing an operation of a first layer and a plurality of sub-cores for executing an operation of a second layer, and the main core may control, when executing a shutdown command received from a host, the plurality of sub-cores so that a second sub-core stores a meta data segment to be processed by a first sub-core among the plurality of sub-cores.
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公开(公告)号:US20220179573A1
公开(公告)日:2022-06-09
申请号:US17240374
申请日:2021-04-26
Applicant: SK hynix Inc.
Inventor: Jin Pyo KIM , Ji Hoon LEE
IPC: G06F3/06
Abstract: A data storage apparatus includes a storage including a plurality of planes, which include a plurality of pages, and a controller configured to control the storage to read data by grouping the plurality of pages as a page group in an interleaving unit, manage pages in which valid data are stored, among the plurality of pages, as a first bitmap table, and manage a second bitmap table generated by compressing the first bitmap table in a page group unit.
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公开(公告)号:US20220229595A1
公开(公告)日:2022-07-21
申请号:US17358936
申请日:2021-06-25
Applicant: SK hynix Inc.
Inventor: Ji Hoon LEE , Chung Un NA
IPC: G06F3/06
Abstract: Provided is a controller which controls a plurality of memory dies. The controller may include: a processor suitable for generating interleaved read commands based on read requests from a host; a memory interface suitable for acquiring the read commands and a host-requested order of the read commands from the processor, controlling page read operations on the plurality of memory dies in response to the read commands, and acquiring data chunks corresponding to read requests from memory dies whose page read operations are completed, according to the host-requested order; and a host interface suitable for providing the host with responses to the read requests according to the order in which the data chunks are acquired.
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公开(公告)号:US20200242044A1
公开(公告)日:2020-07-30
申请号:US16851930
申请日:2020-04-17
Applicant: SK hynix Inc.
Inventor: Min Hwan MOON , Duck Hoi KOO , Soong Sun SHIN , Ji Hoon LEE
IPC: G06F12/10 , G06F12/121 , G06F12/02
Abstract: An operating method for a data storage device includes providing a nonvolatile memory device including a plurality of pages; segmenting an address map which maps a logical address provided from a host device and a physical address of the nonvolatile memory device, by a plurality of address map segments according to a segment size that is set depending on a quality of service time allowed to process a request of the host device and an unprocessed workload; and flushing at least one of the address map segments in the nonvolatile memory device after processing the unprocessed workload.
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公开(公告)号:US20190187902A1
公开(公告)日:2019-06-20
申请号:US16119477
申请日:2018-08-31
Applicant: SK hynix Inc.
Inventor: Ji Hoon LEE
Abstract: Provided herein may be a storage device and a method of operating the same. The storage device for additionally securing an over-provisioning area may include at least one memory device, each including first memory blocks and second memory blocks, and a memory controller configured to store system data, stored in the first memory blocks of the at least one memory device, in the second memory blocks when a size of a residual space in a memory area of the at least one memory device is less than a threshold.
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公开(公告)号:US20190121558A1
公开(公告)日:2019-04-25
申请号:US15984761
申请日:2018-05-21
Applicant: SK hynix Inc.
Inventor: Ji Hoon LEE , Jeong Ho JEON
IPC: G06F3/06 , G06F12/1009
Abstract: Provided herein may be a memory system and a method of operating the memory system. The method includes: allocating a first buffer region to a first workload group; allocating a second buffer region to a second workload group; monitoring a first workload group latency and a second workload group latency; and dynamically adjusting a memory space of each of the first and second buffer regions based on a result of the monitoring.
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公开(公告)号:US20180314642A1
公开(公告)日:2018-11-01
申请号:US15829025
申请日:2017-12-01
Applicant: SK hynix Inc.
Inventor: Min Hwan MOON , Duck Hoi KOO , Soong Sun SHIN , Ji Hoon LEE
IPC: G06F12/10
Abstract: An operating method for a data storage device includes providing a nonvolatile memory device including a plurality of pages; segmenting an address map which maps a logical address provided from a host device and a physical address of the nonvolatile memory device, by a plurality of address map segments according to a segment size that is set depending on a quality of service time allowed to process a request of the host device and an unprocessed workload; and flushing at least one of the address map segments in the nonvolatile memory device after processing the unprocessed workload.
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