公开(公告)号：US10665570B2

公开(公告)日：2020-05-26

申请号：US16183556

申请日：2018-11-07

Applicant: SK hynix Inc.

Inventor： Juil Eom ,  Jae Hoon Lee ,  Bok Kyu Choi

IPC: H01L25/065 ,  H01L23/498

Abstract: A stack package includes a first sub-package and a second sub-package stacked on the first sub-package. The first sub-package includes a first semiconductor chip, a first through mold via (TMV) for connection that is spaced apart from the first semiconductor chip in an X-axis direction, a first TMV for bypass that is spaced apart from the first semiconductor chip in a Y-axis direction, and a redistribution line (RDL) pattern for connecting the first semiconductor chip to the first TMV for connection. The second sub-package includes a second semiconductor chip, a second TMV for connection that is spaced apart from the second semiconductor chip in the Y-axis direction, and another RDL pattern for connecting the second semiconductor chip to the second TMV for connection. The second sub-package stacked is stacked on the first sub-package such that the second TMV for connection is connected to the first TMV for bypass.

公开(公告)号：US11342315B2

公开(公告)日：2022-05-24

申请号：US16184741

申请日：2018-11-08

Applicant: SK hynix Inc.

Inventor： Juil Eom ,  Bok Kyu Choi ,  Jae Hoon Lee ,  Jin Woo Park

IPC: H01L25/10 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01L23/498

Abstract: A stack package includes a first sub-package and a second sub-package stacked on the first sub-package. The first sub-package includes a first through mold via (TMV) for connection spaced apart from a first semiconductor chip in an X-axis direction, a first TMV for bypass spaced apart from the first semiconductor chip in a Y-axis direction, and a first redistribution line (RDL) pattern connecting the first semiconductor chip to the first TMV for connection. The second sub-package includes a second TMV for connection spaced apart from a second semiconductor chip in the Y-axis direction and another RDL pattern connecting the second semiconductor chip to the second TMV for connection. the second sub-package is stacked on the first sub-package such that the second TMV for connection is connected to the first TMV for bypass.

公开(公告)号：US10923434B2

公开(公告)日：2021-02-16

申请号：US16183538

申请日：2018-11-07

Applicant: SK hynix Inc.

Inventor： Bok Kyu Choi ,  Juil Eom ,  Sang Joon Lim

IPC: H01L23/498 ,  H01L23/552

Abstract: A semiconductor package may include a chip disposed on a substrate, a conductive structure disposed on the substrate to include a conductive structure frame including a side surface facing at least one side surface of the chip and to include conductive structure fingers extending from the conductive structure frame toward an edge of the substrate, and an electromagnetic interference (EMI) shielding layer covering the chip and the conductive structure and contacting a side surface of an end of one or more of the conductive structure fingers.