公开(公告)号：US10019197B2

公开(公告)日：2018-07-10

申请号：US14996407

申请日：2016-01-15

Applicant: SK hynix Inc.

Inventor： Kyung-Min Lee ,  Yong-Ju Kim

IPC: G06F3/06

CPC classification number: G06F12/08

Abstract: A semiconductor system may include: a command queue suitable for storing a plurality of requests provided from a host according to rank and bank information of the requests; one or more determination units suitable for determining requests having a same row address in response to row address information of the requests stored in the command queue; an arbitration unit suitable for scheduling the plurality of requests according to internal priorities of the requests; a monitoring unit suitable for providing the rank information and row hit information of the plurality of requests outputted according to the scheduling result of the arbitration unit, to the arbitration unit; a command generation unit suitable for generating a plurality of commands corresponding to and in response to the plurality of requests outputted according to the scheduling result of the arbitration unit; and a semiconductor memory device suitable for performing an internal operation in response to the command, wherein the arbitration unit reschedules the plurality of requests in response to a monitoring result of the monitoring unit and output results of the plurality of determination units, such that all requests inputted during a preset period are processed.

公开(公告)号：US09842035B2

公开(公告)日：2017-12-12

申请号：US15236287

申请日：2016-08-12

Applicant: SK hynix Inc.

Inventor： Kyung-Min Lee ,  Young-Ook Song ,  Ki-Joong Kim ,  Yong-Ju Kim ,  Jung-Hyun Kwon ,  Sang-Gu Jo

IPC: G11C16/04 ,  G06F11/20 ,  G11C5/02 ,  H01L25/065

CPC classification number: G06F11/2017 ,  G06F11/2094 ,  G11C5/025 ,  G11C5/148 ,  G11C11/40618 ,  G11C11/4094 ,  H01L25/0657

Abstract: A semiconductor system includes one or more core chips including a plurality of memory banks; one or more replacement storage units; and a base chip suitable for: first detecting a memory bank having an access frequency that satisfies a first condition, second detecting whether an utilization rate of the first detected memory bank satisfies a second condition, and replacing the second detected memory bank with one among the replacement storage units.

公开(公告)号：US09798491B2

公开(公告)日：2017-10-24

申请号：US14982512

申请日：2015-12-29

Applicant: SK hynix Inc.

Inventor： Kyung-Min Lee ,  Young-Suk Moon

IPC: G06F9/26 ,  G06F3/06 ,  G06F9/345

CPC classification number: G06F3/0653 ,  G06F3/0604 ,  G06F3/0638 ,  G06F3/0679 ,  G06F9/345

Abstract: A semiconductor system may include a plurality of memory devices corresponding to a plurality of channels, an address mapping unit suitable for converting addresses corresponding to provided external requests according to a selected address map among a plurality of address maps; a monitoring unit suitable for monitoring the external requests provided to each of the plurality of channels, and a control unit suitable for providing a control signal for controlling the address mapping unit to select an address map according to a result of the monitoring.