公开(公告)号：US10333464B2

公开(公告)日：2019-06-25

申请号：US15456277

申请日：2017-03-10

Applicant: SOCIONEXT INC.

Inventor： Ian Juso Dedic ,  Abdullah Mohd. Riazuddin Ahmed

IPC: G06F1/10 ,  G06F3/05 ,  H03B5/12 ,  H01L29/94 ,  H03B27/00 ,  H03K5/135

Abstract: There is disclosed herein integrated circuitry comprising a clock path for carrying a clock signal from a clock source to a circuit block, the circuit block being operable based on the clock signal. Clock buffer circuitry is provided along the clock path for buffering the clock signal. A tuneable inductance is connected to the clock path. A capacitor is connected to the clock path so as to form an AC coupling capacitor connected in series along the path, and is implemented between metal layers of the integrated circuitry.

公开(公告)号：US20170264240A1

公开(公告)日：2017-09-14

申请号：US15456277

申请日：2017-03-10

Applicant: SOCIONEXT INC.

Inventor： Ian Juso DEDIC ,  Abdullah Mohd. Riazuddin Ahmed

IPC: H03B5/12 ,  H01L29/94 ,  H03B27/00

CPC classification number: H03B5/1256 ,  G06F1/10 ,  G06F3/05 ,  H01L29/94 ,  H03B5/1293 ,  H03B27/00 ,  H03K5/135

Abstract: There is disclosed herein integrated circuitry comprising a clock path for carrying a clock signal from a clock source to a circuit block, the circuit block being operable based on the clock signal. Clock buffer circuitry is provided along the clock path for buffering the clock signal. A tuneable inductance is connected to the clock path. A capacitor is connected to the clock path so as to form an AC coupling capacitor connected in series along the path, and is implemented between metal layers of the integrated circuitry.