Frequency multiplier based on a low dimensional semiconductor structure
    1.
    发明授权
    Frequency multiplier based on a low dimensional semiconductor structure 有权
    基于低维半导体结构的倍频器

    公开(公告)号:US09530845B2

    公开(公告)日:2016-12-27

    申请号:US14767301

    申请日:2014-03-25

    Inventor: Kunyuan Xu

    CPC classification number: H01L29/2003 H01L29/778 H03B19/14

    Abstract: A frequency multiplier based on a low dimensional semiconductor structure, including an insulating substrate layer, a semiconductor conducting layer arranged on the surface of the insulating substrate layer, an insulating protective layer arranged on the surface of the semiconductor conducting layer, an insulating carving groove penetrating the semiconductor conducting layer, an inlet electrode arranged on the side surface of the semiconductor conducting layer, and an outlet electrode arranged on the side surface corresponding to the access electrode is provided. The semiconductor conducting layer comprises two two-dimensional, quasi-one-dimensional, or one-dimensional current carrying channels near to and parallel to each other. The frequency multiplier has advantages that the structure is simple, the process is easy to implement, no extra filter circuit needs to be added, dependence on material characteristics is little, and the selection range of materials is wide.

    Abstract translation: 基于低维半导体结构的倍频器,包括绝缘基板层,布置在绝缘基板层的表面上的半导体导电层,布置在半导体导电层的表面上的绝缘保护层,穿透 设置半导体导电层,布置在半导体导电层的侧表面上的入口电极和布置在与存取电极相对应的侧表面上的出口电极。 半导体导电层包括彼此靠近并且彼此平行的两个二维,准一维或一维载流通道。 倍频器具有结构简单,易于实现的优点,不需要添加额外的滤波电路,材料特性依赖性小,材料选择范围广。

    FREQUENCY MULTIPLIER BASED ON A LOW DIMENSIONAL SEMICONDUCTOR STRUCTURE
    2.
    发明申请
    FREQUENCY MULTIPLIER BASED ON A LOW DIMENSIONAL SEMICONDUCTOR STRUCTURE 有权
    基于低尺寸半导体结构的频率乘法器

    公开(公告)号:US20160035837A1

    公开(公告)日:2016-02-04

    申请号:US14767301

    申请日:2014-03-25

    Inventor: Kunyuan Xu

    CPC classification number: H01L29/2003 H01L29/778 H03B19/14

    Abstract: A frequency multiplier based on a low dimensional semiconductor structure, including an insulating substrate layer, a semiconductor conducting layer arranged on the surface of the insulating substrate layer, an insulating protective layer arranged on the surface of the semiconductor conducting layer, an insulating carving groove penetrating the semiconductor conducting layer, an inlet electrode arranged on the side surface of the semiconductor conducting layer, and an outlet electrode arranged on the side surface corresponding to the access electrode is provided. The semiconductor conducting layer comprises two two-dimensional, quasi-one-dimensional, or one-dimensional current carrying channels near to and parallel to each other. The frequency multiplier has advantages that the structure is simple, the process is easy to implement, no extra filter circuit needs to be added, dependence on material characteristics is little, and the selection range of materials is wide.

    Abstract translation: 基于低维半导体结构的倍频器,包括绝缘基板层,布置在绝缘基板层的表面上的半导体导电层,布置在半导体导电层的表面上的绝缘保护层,穿透 设置半导体导电层,布置在半导体导电层的侧表面上的入口电极和布置在与存取电极相对应的侧表面上的出口电极。 半导体导电层包括彼此靠近并且彼此平行的两个二维,准一维或一维载流通道。 倍频器具有结构简单,易于实现的优点,不需要添加额外的滤波电路,材料特性依赖性小,材料选择范围广。

    Planar nano-oscillator array having phase locking function

    公开(公告)号:US10263020B2

    公开(公告)日:2019-04-16

    申请号:US15311221

    申请日:2014-12-23

    Inventor: Kunyuan Xu

    Abstract: Provided is a planar nano-oscillator array having phase locking function, including two or more planar nano-oscillators which are arranged in parallel. The two oscillators are connected by planar resistors and capacitors, and a structure thereof includes: electrodes; respectively introducing two pairs of laterally arranged parallel insulation notch grooves into two-dimensional electron gas layers, so as to form oscillation channels; vertically disposing separating insulation notch grooves, so that a planar resistor A with low resistance which is connected to the electrode is formed on the left side, and a planar resistor B with low resistance which is connected to the electrode is formed on the right side; and arranging, between the two oscillators, an insulation capacitor notch groove which is parallel to the oscillation channels, insulating materials having a high dielectric constant being filled therein.

Patent Agency Ranking