公开(公告)号：US12100619B2

公开(公告)日：2024-09-24

申请号：US17093597

申请日：2020-11-09

Applicant: SPTS Technologies Limited

Inventor： Martin Hanicinec ,  Janet Hopkins ,  Oliver Ansell

IPC: H01L21/78 ,  H01L21/3065 ,  H01L21/67

CPC classification number: H01L21/78 ,  H01L21/3065 ,  H01L21/67069 ,  H01L21/67092

Abstract: A semiconductor wafer dicing process is disclosed for dicing a wafer into individual dies, each die comprising one integrated circuit. The process comprises: disposing a coating upon the wafer; removing at least a portion of the coating to expose regions of the wafer, along which the wafer is to be diced, to form a workpiece; disposing the workpiece upon a platen within a processing chamber; plasma treating the workpiece with a set of plasma treatment conditions to etch a portion of the exposed regions of the wafer to form a wafer groove which extends laterally beneath the coating to form an undercut; and plasma etching the workpiece with a set of plasma etch conditions, which are different to the plasma treatment conditions, to etch through the wafer and dice the wafer along the wafer groove.

公开(公告)号：US20210175122A1

公开(公告)日：2021-06-10

申请号：US17093597

申请日：2020-11-09

Applicant: SPTS Technologies Limited

Inventor： Martin Hanicinec ,  Janet Hopkins ,  Oliver Ansell

IPC: H01L21/78 ,  H01L21/3065 ,  H01L21/67

Abstract: A semiconductor wafer dicing process is disclosed for dicing a wafer into individual dies, each die comprising one integrated circuit. The process comprises: disposing a coating upon the wafer; removing at least a portion of the coating to expose regions of the wafer, along which the wafer is to be diced, to form a workpiece; disposing the workpiece upon a platen within a processing chamber; plasma treating the workpiece with a set of plasma treatment conditions to etch a portion of the exposed regions of the wafer to form a wafer groove which extends laterally beneath the coating to form an undercut; and plasma etching the workpiece with a set of plasma etch conditions, which are different to the plasma treatment conditions, to etch through the wafer and dice the wafer along the wafer groove.