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公开(公告)号:US12100619B2
公开(公告)日:2024-09-24
申请号:US17093597
申请日:2020-11-09
Applicant: SPTS Technologies Limited
Inventor: Martin Hanicinec , Janet Hopkins , Oliver Ansell
IPC: H01L21/78 , H01L21/3065 , H01L21/67
CPC classification number: H01L21/78 , H01L21/3065 , H01L21/67069 , H01L21/67092
Abstract: A semiconductor wafer dicing process is disclosed for dicing a wafer into individual dies, each die comprising one integrated circuit. The process comprises: disposing a coating upon the wafer; removing at least a portion of the coating to expose regions of the wafer, along which the wafer is to be diced, to form a workpiece; disposing the workpiece upon a platen within a processing chamber; plasma treating the workpiece with a set of plasma treatment conditions to etch a portion of the exposed regions of the wafer to form a wafer groove which extends laterally beneath the coating to form an undercut; and plasma etching the workpiece with a set of plasma etch conditions, which are different to the plasma treatment conditions, to etch through the wafer and dice the wafer along the wafer groove.
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公开(公告)号:US20230170188A1
公开(公告)日:2023-06-01
申请号:US17983341
申请日:2022-11-08
Applicant: SPTS Technologies Limited
Inventor: Alex Huw Wood , Kevin Riddell , Huma Ashraf , Janet Hopkins
IPC: H01J37/32
CPC classification number: H01J37/32449 , H01J37/32816 , H01J2237/3343 , H01J2237/182 , H01J37/321
Abstract: An additive-containing aluminium nitride film is plasma etched. The additive-containing aluminium nitride film contains an additive element selected from scandium, yttrium or erbium. A workpiece is placed upon a platen within a plasma chamber. The workpiece includes a substrate having an additive-containing aluminium nitride film deposited thereon and a mask disposed upon the additive-containing aluminium nitride film, which defines at least one trench. A first etching gas is introduced into the chamber with a first flow rate, a second etching gas is introduced into the chamber with a second flow rate, and a plasma is established within the chamber to etch the additive-containing aluminium nitride film exposed within the trench. The first etching gas comprises boron trichloride and the second etching gas comprises chlorine. A ratio of the first flow rate to the second flow rate is greater than or equal to 1:1.
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公开(公告)号:US09842772B2
公开(公告)日:2017-12-12
申请号:US14678048
申请日:2015-04-03
Applicant: SPTS TECHNOLOGIES LIMITED
Inventor: Jash Patel , Janet Hopkins
IPC: H01L21/768 , H01L21/3065 , H01L21/66 , H01L21/67 , H01J37/32
CPC classification number: H01L21/76898 , H01J37/321 , H01J37/32706 , H01J37/32715 , H01L21/3065 , H01L21/67069 , H01L22/12 , H01L22/26
Abstract: A method is for etching a semiconductor substrate to reveal one or more features buried in the substrate. The method includes performing a first etch step using a plasma in which a bias power is applied to the substrate to produce an electrical bias, performing a second etch step without a bias power or with a bias power which is lower than the bias power applied during the first etch step, and alternately repeating the first and second etch steps.
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公开(公告)号:US20220199409A1
公开(公告)日:2022-06-23
申请号:US17548148
申请日:2021-12-10
Applicant: SPTS Technologies Limited
Inventor: Janet Hopkins , Simon Dawson
IPC: H01L21/3065 , H01J37/32 , H01L21/683
Abstract: A metallic feature on a substrate is subjected to a plasma dicing process and is cleaned. The workpiece has a carrier sheet attached to a frame member. The carrier sheet carries the substrate. The workpiece is provided on a workpiece support disposed within a chamber of an inductively coupled plasma apparatus. A sputter etch step is performed, including introducing a sputter gas or gas mixture into the chamber and sustaining an inductively coupled plasma of the sputter gas or gas mixture so as to sputter etch the substrate. A chemical etch step also is performed, including introducing O2 gas and/or O3 gas) into the chamber and sustaining an inductively coupled plasma of the O2 and/or O3 gas) so as to chemically etch the substrate. The sputter etch step and chemical etch step can be repeated.
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公开(公告)号:US20210175122A1
公开(公告)日:2021-06-10
申请号:US17093597
申请日:2020-11-09
Applicant: SPTS Technologies Limited
Inventor: Martin Hanicinec , Janet Hopkins , Oliver Ansell
IPC: H01L21/78 , H01L21/3065 , H01L21/67
Abstract: A semiconductor wafer dicing process is disclosed for dicing a wafer into individual dies, each die comprising one integrated circuit. The process comprises: disposing a coating upon the wafer; removing at least a portion of the coating to expose regions of the wafer, along which the wafer is to be diced, to form a workpiece; disposing the workpiece upon a platen within a processing chamber; plasma treating the workpiece with a set of plasma treatment conditions to etch a portion of the exposed regions of the wafer to form a wafer groove which extends laterally beneath the coating to form an undercut; and plasma etching the workpiece with a set of plasma etch conditions, which are different to the plasma treatment conditions, to etch through the wafer and dice the wafer along the wafer groove.
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