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公开(公告)号：US09836070B2
公开(公告)日：2017-12-05
申请号：US14937671
申请日：2015-11-10
Applicant: STMICROELECTRONICS (ROUSSET) SAS
Inventor： Jimmy Fort , Thierry Soude
CPC classification number: G05F1/575 , H03F3/45179
Abstract: The regulator with a low dropout voltage comprises an error amplifier comprising a differential pair of input transistors and a circuit with folded cascode structure connected to the output of the said differential pair, an output stage connected to the output node of the error amplifier, and a Miller compensation capacitor connected between the output stage and the cascode node on the output side (XP) of the cascode circuit; the error amplifier furthermore comprises at least one inverting amplifier module in a feedback loop between the said cascode node and the gate of the cascode transistor of the cascode circuit connected between the said cascode node and the said output node.
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公开(公告)号：US09454163B2
公开(公告)日：2016-09-27
申请号：US14612063
申请日：2015-02-02
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Jimmy Fort , Thierry Soude
Abstract: According to an embodiment, generating an adjustable bandgap reference voltage includes generating a current proportional to absolute temperature (PTAT). Generating the PTAT current includes equalizing voltages across the terminals of a core that is designed to be traversed by the PTAT current. Generating the adjustable bandgap reference also includes generating a current inversely proportional to absolute temperature (CTAT), summing the PTAT and the CTAT currents and generating the bandgap reference voltage based on the sum of the currents. Equalizing includes connecting-across the terminals of the core a first fed-back amplifier with at least one first stage arranged as a folded setup and including first PMOS transistors arranged according to a common-gate setup. Equalizing also includes biasing the first stage based on the CTAT current. The summation of the PTAT and CTAT currents is performed in the feedback stage of the first amplifier.
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公开(公告)号：US09052345B2
公开(公告)日：2015-06-09
申请号：US13654991
申请日：2012-10-18
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Mathieu Lisart , Thierry Soude
CPC classification number: G01R27/08 , G01R31/2856 , G01R31/311 , G01R31/31719 , G09C1/00 , H01L23/576 , H01L2924/0002 , H04L9/004 , H04L2209/12 , H01L2924/00
Abstract: A system for detecting a laser attack on an integrated circuit chip formed in a semiconductor substrate, including a detection device capable of detecting voltage variations of the substrate. The system includes P-type first wells and N-type second wells extending in a P-type upper portion of the substrate; an N-type buried layer extending under at least a portion of the first and second wells; biasing contacts for the second wells and the buried layer; ground contacts for the first wells; and substrate contacts for detecting a substrate voltage, the detection contacts surrounding the first and second wells. The detection device comprises a resistor having a first terminal connected to said ground contacts of the first wells and a second terminal connected to said substrate contacts; and a comparator connected in with the resistor configured to detect a potential difference across the resistor.
Abstract translation: 一种用于检测形成在半导体衬底中的集成电路芯片上的激光攻击的系统，包括能够检测衬底的电压变化的检测装置。 该系统包括在基板的P型上部中延伸的P型第一阱和N型第二阱; 在所述第一和第二孔的至少一部分下延伸的N型掩埋层; 用于第二井和埋层的偏压接触; 第一口井的地面接触; 以及用于检测衬底电压的衬底触点，围绕第一和第二阱的检测触点。 检测装置包括电阻器，其具有连接到第一阱的所述接地触点的第一端子和连接到所述衬底触点的第二端子; 以及与电阻器连接的比较器，被配置为检测电阻器两端的电位差。
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4.发明申请公开(公告)号：US20150145487A1
公开(公告)日：2015-05-28
申请号：US14612063
申请日：2015-02-02
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Jimmy Fort , Thierry Soude
IPC: G05F1/46
Abstract: According to an embodiment, generating an adjustable bandgap reference voltage includes generating a current proportional to absolute temperature (PTAT). Generating the PTAT current includes equalizing voltages across the terminals of a core that is designed to be traversed by the PTAT current. Generating the adjustable bandgap reference also includes generating a current inversely proportional to absolute temperature (CTAT), summing the PTAT and the CTAT currents and generating the bandgap reference voltage based on the sum of the currents. Equalizing includes connecting-across the terminals of the core a first fed-back amplifier with at least one first stage arranged as a folded setup and including first PMOS transistors arranged according to a common-gate setup. Equalizing also includes biasing the first stage based on the CTAT current. The summation of the PTAT and CTAT currents is performed in the feedback stage of the first amplifier.
Abstract translation: 根据实施例，产生可调节带隙参考电压包括产生与绝对温度（PTAT）成比例的电流。 产生PTAT电流包括跨越由PTAT电流穿过的芯的端子的均衡电压。 生成可调节带隙基准还包括产生与绝对温度（CTAT）成反比的电流，对PTAT和CTAT电流求和，并根据电流之和产生带隙基准电压。 均衡包括将核心的端子连接到具有布置为折叠设置的至少一个第一级的第一反馈放大器，并且包括根据公共门设置布置的第一PMOS晶体管。 均衡还包括基于CTAT电流偏置第一阶段。 在第一放大器的反馈级中执行PTAT和CTAT电流的求和。
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5.发明申请公开(公告)号：US20170192448A1
公开(公告)日：2017-07-06
申请号：US15467927
申请日：2017-03-23
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Nicolas DEMANGE , Jimmy Fort , Thierry Soude
CPC classification number: G05F3/262 , G06F21/755 , G06K19/0723 , H01L23/576 , H03B29/00
Abstract: A method for smoothing current consumed by an electronic device is based on a series of current copying operations and on a current source delivering a reference current. The reference current is delivered in such a manner that current consumed as seen from the power supply depends on the reference current.
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Patent Agency Ranking
6.发明授权公开(公告)号：US09678525B2
公开(公告)日：2017-06-13
申请号：US15150713
申请日：2016-05-10
Applicant: STMICROELECTRONICS (ROUSSET) SAS
Inventor： Nicolas Demange , Jimmy Fort , Thierry Soude
CPC classification number: G05F3/262 , G06F21/755 , G06K19/0723 , H01L23/576 , H03B29/00
Abstract: A method for smoothing current consumed by an electronic device is based on a series of current copying operations and on a current source delivering a reference current. The reference current is delivered in such a manner that current consumed as seen from the power supply depends on the reference current.
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公开(公告)号：US09190969B2
公开(公告)日：2015-11-17
申请号：US13827044
申请日：2013-03-14
Applicant: STMICROELECTRONICS (Rousset) SAS
Inventor： Jimmy Fort , Thierry Soude
CPC classification number: G05F1/575 , H03F3/45179
Abstract: The regulator with a low dropout voltage comprises an error amplifier comprising a differential pair of input transistors and a circuit with folded cascode structure connected to the output of the said differential pair, an output stage connected to the output node of the error amplifier, and a Miller compensation capacitor connected between the output stage and the cascode node on the output side (XP) of the cascode circuit; the error amplifier furthermore comprises at least one inverting amplifier module in a feedback loop between the said cascode node and the gate of the cascode transistor of the cascode circuit connected between the said cascode node and the said output node.
Abstract translation: 具有低压降电压的调节器包括误差放大器，该误差放大器包括差分输入晶体管对和连接到所述差分对的输出的折叠共源共栅结构的电路，连接到误差放大器的输出节点的输出级，以及 米勒补偿电容连接在共源共栅电路的输出侧（XP）的输出级与共源共栅节点之间; 误差放大器还包括在所述共源共栅节点和连接在所述共源共栅节点和所述输出节点之间的共源共栅电路的共源共栅晶体管的栅极之间的反馈回路中的至少一个反相放大器模块。
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8.发明申请Device for Generating an Adjustable Bandgap Reference Voltage with Large Power Supply Rejection Rate 审中-公开用于产生具有大电源抑制率的可调带隙参考电压的装置公开(公告)号：US20150153753A1
公开(公告)日：2015-06-04
申请号：US14616481
申请日：2015-02-06
Applicant: STMICROELECTRONICS (ROUSSET) SAS
Inventor： Jimmy Fort , Thierry Soude
IPC: G05F1/625
Abstract: An adjustable bandgap reference voltage includes a first circuit for generating IPTAT, a second circuit for generating ICTAT, and an output module configured to generate the reference voltage. The first circuit includes a first amplifier connected to terminals of a core for equalizing voltages across the terminals, where the first amplifier has a first stage that is biased by the current inversely proportional to absolute temperature and is arranged according to a folded setup with first PMOS transistors arranged according to a common-gate setup. The first circuit also includes a feedback stage with an input connected to the first amplifier output. The feedback stage output is connected to the first stage input and to a terminal of the core. The second circuit includes a follower amplifier connected to a terminal of the core and separated from the first amplifier and the output module is connected to the feedback stage.
Abstract translation: 可调节带隙参考电压包括用于产生IPTAT的第一电路，用于产生ICTAT的第二电路和被配置为产生参考电压的输出模块。 第一电路包括连接到芯的端子的第一放大器，用于均衡端子两端的电压，其中第一放大器具有被绝对温度成反比的电流偏置的第一级，并且根据折叠设置与第一PMOS 根据共门设置布置的晶体管。 第一电路还包括具有连接到第一放大器输出的输入的反馈级。 反馈级输出连接到第一级输入端和核心端子。 第二电路包括连接到芯的端子并与第一放大器分离的跟随放大器，并且输出模块连接到反馈级。
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公开(公告)号：US09024602B2
公开(公告)日：2015-05-05
申请号：US13848403
申请日：2013-03-21
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Jimmy Fort , Thierry Soude
Abstract: The regulator with low dropout voltage comprises an error amplifier and an output stage comprising an output transistor and a buffer circuit comprising an input connected to the output node of the error amplifier, an output connected to the output transistor, a follower amplifier connected between the input and the output of the buffer circuit. The buffer circuit furthermore comprises a transistor active load connected to the output of the follower amplifier and a negative feedback amplifier arranged in common gate configuration and connected between the output of the follower amplifier and the gate of the transistor of the active load.
Abstract translation: 具有低压差电压的调节器包括误差放大器和输出级，输出级包括输出晶体管和缓冲电路，缓冲电路包括连接到误差放大器的输出节点的输入端，连接到输出晶体管的输出端，连接在输入端 和缓冲电路的输出。 缓冲电路还包括连接到从动放大器的输出的晶体管有源负载和以公共栅极配置布置并连接在从动放大器的输出端和有源负载晶体管的栅极之间的负反馈放大器。
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公开(公告)号：US20130257401A1
公开(公告)日：2013-10-03
申请号：US13848403
申请日：2013-03-21
Applicant: STMICROELECTRONICS (ROUSSET) SAS
Inventor： Jimmy Fort , Thierry Soude
IPC: G05F1/46
Abstract: The regulator with low dropout voltage comprises an error amplifier and an output stage comprising an output transistor and a buffer circuit comprising an input connected to the output node of the error amplifier, an output connected to the output transistor, a follower amplifier connected between the input and the output of the buffer circuit. The buffer circuit furthermore comprises a transistor active load connected to the output of the follower amplifier and a negative feedback amplifier arranged in common gate configuration and connected between the output of the follower amplifier and the gate of the transistor of the active load.
Abstract translation: 具有低压差电压的调节器包括误差放大器和输出级，输出级包括输出晶体管和缓冲电路，缓冲电路包括连接到误差放大器的输出节点的输入端，连接到输出晶体管的输出端，连接在输入端 和缓冲电路的输出。 缓冲电路还包括连接到从动放大器的输出的晶体管有源负载和以公共栅极配置布置并连接在从动放大器的输出端和有源负载晶体管的栅极之间的负反馈放大器。
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