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1.
公开(公告)号:US20170192448A1
公开(公告)日:2017-07-06
申请号:US15467927
申请日:2017-03-23
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Nicolas DEMANGE , Jimmy Fort , Thierry Soude
CPC classification number: G05F3/262 , G06F21/755 , G06K19/0723 , H01L23/576 , H03B29/00
Abstract: A method for smoothing current consumed by an electronic device is based on a series of current copying operations and on a current source delivering a reference current. The reference current is delivered in such a manner that current consumed as seen from the power supply depends on the reference current.
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公开(公告)号:US20210151977A1
公开(公告)日:2021-05-20
申请号:US17095652
申请日:2020-11-11
Inventor: Manoj KUMAR , Ravinder KUMAR , Nicolas DEMANGE
Abstract: An integrated circuit includes an overvoltage protection circuit. The overvoltage protection circuit detects overvoltage events at a pad of the integrated circuit. The overvoltage protection circuit generates a max voltage signal that is the greater of the voltage at the pad and a supply voltage of the integrated circuit. The overvoltage protection circuit disables a PMOS transistor coupled to the pad by supplying the max voltage signal to the gate of the PMOS transistor when an overvoltage event is present at the pad.
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公开(公告)号:US20230155369A1
公开(公告)日:2023-05-18
申请号:US18157737
申请日:2023-01-20
Inventor: Manoj KUMAR , Ravinder KUMAR , Nicolas DEMANGE
CPC classification number: H02H3/20 , H02H1/0007
Abstract: An integrated circuit includes an overvoltage protection circuit. The overvoltage protection circuit detects overvoltage events at a pad of the integrated circuit. The overvoltage protection circuit generates a max voltage signal that is the greater of the voltage at the pad and a supply voltage of the integrated circuit. The overvoltage protection circuit disables a PMOS transistor coupled to the pad by supplying the max voltage signal to the gate of the PMOS transistor when an overvoltage event is present at the pad.
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公开(公告)号:US20210248104A1
公开(公告)日:2021-08-12
申请号:US17143679
申请日:2021-01-07
Inventor: Manoj KUMAR , Kailash KUMAR , Nicolas DEMANGE
Abstract: A serial peripheral interface (SPI) device includes a serial clock (SCK) pad receiving a serial clock, first and second Schmitt triggers directly electrically connected to the SCK pad to selectively respectively generate first and second clocks in response to rising and falling edges of the serial clock, first and second flip flops clocked by the first and second clocks to output bits of data to a data node, a multiplexer having an input coupled to the data node and an output coupled to driving circuitry, and driving circuitry transmitting data via a master-in-slave-out (MISO) pad.
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5.
公开(公告)号:US20170097653A1
公开(公告)日:2017-04-06
申请号:US15150713
申请日:2016-05-10
Applicant: STMICROELECTRONICS (ROUSSET) SAS
Inventor: Nicolas DEMANGE , Jimmy FORT , Thierry SOUDE
CPC classification number: G05F3/262 , G06F21/755 , G06K19/0723 , H01L23/576 , H03B29/00
Abstract: A method for smoothing current consumed by an electronic device is based on a series of current copying operations and on a current source delivering a reference current. The reference current is delivered in such a manner that current consumed as seen from the power supply depends on the reference current.
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