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公开(公告)号:US20220321124A1
公开(公告)日:2022-10-06
申请号:US17846362
申请日:2022-06-22
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Nicolas Borrel , Jimmy Fort , Mathieu Lisart
IPC: H03K19/003 , H03F3/45 , H03K19/00 , H03K19/17736 , H03L7/097
Abstract: A physically unclonable function device includes a set of diode-connected MOS transistors having a random distribution of respective threshold voltages. A first circuit is configured to impose, on each first transistor, a fixed respective gate voltage regardless of the value of a current flowing in this first transistor. A second circuit is configured to impose, on each second transistor, a fixed respective gate voltage regardless of the value of a current flowing in this second transistor. A current mirror stage is coupled between the first circuit and the second circuit and is configured to deliver the reference current from a sum of the currents flowing in the first transistors. A comparator is configured to deliver a signal whose level depends on a comparison between a first current obtained from a reference current based on the first transistors and a second current of the second transistors.
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2.
公开(公告)号:US20210181778A1
公开(公告)日:2021-06-17
申请号:US17119788
申请日:2020-12-11
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Jimmy Fort , Nicolas Demange
Abstract: An embodiment method for smoothing consumed current is based on a current copying suite and on a current source supplying a reference current, the currents being transformed into a reference voltage for the regulation of a voltage regulator such that the consumed current viewed by the power supply only depends on the reference current.
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公开(公告)号:US10769513B2
公开(公告)日:2020-09-08
申请号:US16227525
申请日:2018-12-20
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Alexandre Sarafianos , Thomas Ordas , Yanis Linge , Jimmy Fort
IPC: G06K19/073 , G06F21/75 , G06F21/44 , H01L23/00
Abstract: An electronic device includes a logic circuit and an auxiliary circuit. The logic circuit includes a first terminal coupled to a supply voltage terminal, a second terminal intended coupled to a reference voltage terminal and an output terminal configured to deliver a signal in a high state or a low state. The auxiliary circuit is coupled between the first terminal and the second terminal and is configured to randomly generate or not generate an additional current between the first terminal and the second terminal on each change of state of the signal on the output terminal.
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公开(公告)号:US20140191578A1
公开(公告)日:2014-07-10
申请号:US14147814
申请日:2014-01-06
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Jimmy Fort , Fabrice Marinet
IPC: G05F1/46
CPC classification number: G05F1/462 , G06F1/26 , G06F1/3237 , G06F21/755 , Y02D10/128 , Y10T307/549
Abstract: The current signature of an electronic function is masked by controlling a current source that supplies power for the electronic function is controlled in a dynamically-varying manner. Excess current is detected and compared to a threshold. If the detected excess current meets the threshold, the operation of the electronic function is modified, for example by controlling a clock.
Abstract translation: 通过控制以动态变化的方式控制为电子功能供电的电流源,屏蔽电子功能的当前签名。 检测到过多的电流并将其与阈值进行比较。 如果检测到的过电流满足阈值,则例如通过控制时钟来修改电子功能的操作。
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公开(公告)号:US11374569B2
公开(公告)日:2022-06-28
申请号:US17413459
申请日:2019-11-28
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Nicolas Borrel , Jimmy Fort , Mathieu Lisart
IPC: H03K5/22 , H03K19/003 , H03K19/00 , H03K19/17736 , H03F3/45 , H03L7/097 , H04L9/32
Abstract: The physically unclonable function device (DIS) comprises a set of MOS transistors (TR1i, TR2j) mounted in diodes having a random distribution of respective threshold voltages, and comprising N first transistors and at least one second transistor. At least one output node of the function is capable of delivering a signal, the level of which depends on the comparison between a current obtained using a current circulating in the at least one second transistor and a current obtained using a reference current that is equal or substantially equal to the average of the currents circulating in the N first transistors. A first means (FM1i) is configured to impose on each first transistor a respective fixed gate voltage regardless of the value of the current circulating in the first transistor, and a second means (SM2j) is configured to impose a respective fixed gate voltage on each second transistor regardless of the value of the current circulating in the second transistor.
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公开(公告)号:US11249501B2
公开(公告)日:2022-02-15
申请号:US17070380
申请日:2020-10-14
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Jimmy Fort
Abstract: A device includes a first transistor connected between a first node and an output terminal and a first current source connected between the first node and a supply rail. A circuit includes a second current source connected between the supply rail and a second node, an operational amplifier having a non-inverting input configured to receive a potential set point, and a second transistor connected between the second node and an inverting input of the operational amplifier. An output of the operational amplifier is connected to a control terminal of the second transistor and further connected to a control terminal of the first transistor.
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公开(公告)号:US10768229B2
公开(公告)日:2020-09-08
申请号:US16059793
申请日:2018-08-09
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Nicolas Borrel , Jimmy Fort
IPC: G01R31/40 , G01R31/317 , G01R19/165 , G06F1/28 , H02M1/00
Abstract: A circuit for detecting a glitch in power supply includes a detection circuit to detect the glitch in a DC supply voltage of the power supply when a magnitude in the glitch in a DC supply voltage of the power supply exceeds a detection threshold, wherein the detection threshold is a function of the DC supply voltage, and wherein the detection circuit comprises a low pass filter, a control circuit coupled to the low pass filter, and a current mirror circuit coupled to the control circuit having an output for providing a logic signal indicative of a detected glitch.
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公开(公告)号:US20190122090A1
公开(公告)日:2019-04-25
申请号:US16227525
申请日:2018-12-20
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Alexandre Sarafianos , Thomas Ordas , Yanis Linge , Jimmy Fort
IPC: G06K19/073 , G06F21/75 , G06F21/44 , H01L23/00
Abstract: An electronic device includes a logic circuit and an auxiliary circuit. The logic circuit includes a first terminal coupled to a supply voltage terminal, a second terminal intended coupled to a reference voltage terminal and an output terminal configured to deliver a signal in a high state or a low state. The auxiliary circuit is coupled between the first terminal and the second terminal and is configured to randomly generate or not generate an additional current between the first terminal and the second terminal on each change of state of the signal on the output terminal.
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公开(公告)号:US10198683B2
公开(公告)日:2019-02-05
申请号:US15798553
申请日:2017-10-31
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Alexandre Sarafianos , Thomas Ordas , Yanis Linge , Jimmy Fort
IPC: G06K19/073 , G06F21/75 , G06F21/44 , H01L23/00 , H03K19/173 , H03K17/693
Abstract: An electronic device randomly modifies a current profile of a logic circuit by using an auxiliary circuit. The logic circuit includes a first terminal coupled to a supply voltage terminal, a second terminal coupled to a reference voltage terminal and an output terminal configured to deliver a signal in a high state or a low state. The auxiliary circuit is coupled between the first terminal and the second terminal and is configured to randomly generate or not generate an additional current between the first terminal and the second terminal on each change of state of the signal on the output terminal.
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10.
公开(公告)号:US10054973B2
公开(公告)日:2018-08-21
申请号:US15467927
申请日:2017-03-23
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Nicolas Demange , Jimmy Fort , Thierry Soude
CPC classification number: G05F3/262 , G06F21/755 , G06K19/0723 , H01L23/576 , H03B29/00
Abstract: A method for smoothing current consumed by an electronic device is based on a series of current copying operations and on a current source delivering a reference current. The reference current is delivered in such a manner that current consumed as seen from the power supply depends on the reference current.
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