公开(公告)号：US20250095998A1

公开(公告)日：2025-03-20

申请号：US18967306

申请日：2024-12-03

Applicant: STMicroelectronics S.r.l.

Inventor： Ferdinando IUCOLANO ,  Cristina TRINGALI

IPC: H01L21/285 ,  H01L21/3213 ,  H01L29/20 ,  H01L29/205 ,  H01L29/47 ,  H01L29/66 ,  H01L29/778

Abstract: A method for manufacturing a HEMT device includes forming, on a heterostructure, a dielectric layer, forming a through opening through the dielectric layer, and forming a gate electrode in the through opening. Forming the gate electrode includes forming a sacrificial structure, depositing by evaporation a first gate metal layer, carrying out a lift-off of the sacrificial structure, depositing a second gate metal layer by sputtering, and depositing a third gate metal layer. The second gate metal layer layer forms a barrier against the diffusion of metal atoms towards the heterostructure.

公开(公告)号：US20230282727A1

公开(公告)日：2023-09-07

申请号：US18174462

申请日：2023-02-24

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Ferdinando IUCOLANO ,  Alessandro CHINI

IPC: H01L29/66 ,  H01L29/778 ,  H01L29/423 ,  H01L29/40

CPC classification number: H01L29/66462 ,  H01L29/7786 ,  H01L29/4232 ,  H01L29/401

Abstract: An HEMT device includes a heterostructure, an insulation layer that extends on the heterostructure and has a thickness along a first direction, and a gate region. The gate region has a first portion that extends through the insulation layer, throughout the thickness of the insulation layer, and has a second portion that extends in the heterostructure. The first portion of the gate region has a first width along a second direction transverse to the first direction. The second portion of the gate region has a second width, along the second direction, that is different from the first width.

公开(公告)号：US20230246088A1

公开(公告)日：2023-08-03

申请号：US18156976

申请日：2023-01-19

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Ferdinando IUCOLANO ,  Giuseppe Greco ,  Paolo BADALA' ,  Fabrizio ROCCAFORTE ,  Monia SPERA

IPC: H01L29/66 ,  H01L29/778

CPC classification number: H01L29/66462 ,  H01L29/7786

Abstract: A process for manufacturing a HEMT device includes forming a conductive region on a work body having a semiconductive heterostructure. To obtain the conductive region, a first reaction region having carbon is formed on the heterostructure and a metal stack is formed having a second reaction region in contact with the first reaction region. The work body is annealed, so that the first reaction region reacts with the second reaction region, thus forming an interface portion of the conductive region. The interface portion is of a compound having carbon and is in ohmic contact with the semiconductive hetero structure.

公开(公告)号：US20230047815A1

公开(公告)日：2023-02-16

申请号：US17977971

申请日：2022-10-31

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Ferdinando IUCOLANO ,  Alessandro CHINI

IPC: H01L29/778 ,  H01L29/66 ,  H01L29/06 ,  H01L21/02 ,  H01L29/20 ,  H01L29/205 ,  H01L29/40

Abstract: An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.

公开(公告)号：US20210367062A1

公开(公告)日：2021-11-25

申请号：US17396154

申请日：2021-08-06

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Ferdinando IUCOLANO ,  Alfonso PATTI ,  Alessandro CHINI

IPC: H01L29/66 ,  H01L29/423 ,  H01L29/778 ,  H01L29/205

Abstract: A method forms an HEMT transistor of the normally off type, including: a semiconductor heterostructure, which comprises at least one first layer and one second layer, the second layer being set on top of the first layer; a trench, which extends through the second layer and a portion of the first layer; a gate region of conductive material, which extends in the trench; and a dielectric region, which extends in the trench, coats the gate region, and contacts the semiconductor heterostructure. A part of the trench is delimited laterally by a lateral structure that forms at least one first step. The semiconductor heterostructure forms a first edge and a second edge of the first step, the first edge being formed by the first layer.

公开(公告)号：US20240178301A1

公开(公告)日：2024-05-30

申请号：US18530050

申请日：2023-12-05

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Ferdinando IUCOLANO ,  Alfonso PATTI ,  Alessandro CHINI

IPC: H01L29/66 ,  H01L29/20 ,  H01L29/205 ,  H01L29/423 ,  H01L29/778

CPC classification number: H01L29/66462 ,  H01L29/205 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/7786 ,  H01L29/7787 ,  H01L29/2003

Abstract: A method forms an HEMT transistor of the normally off type, including: a semiconductor heterostructure, which comprises at least one first layer and one second layer, the second layer being set on top of the first layer; a trench, which extends through the second layer and a portion of the first layer; a gate region of conductive material, which extends in the trench; and a dielectric region, which extends in the trench, coats the gate region, and contacts the semiconductor heterostructure. A part of the trench is delimited laterally by a lateral structure that forms at least one first step. The semiconductor heterostructure forms a first edge and a second edge of the first step, the first edge being formed by the first layer.

公开(公告)号：US20240021718A1

公开(公告)日：2024-01-18

申请号：US18477372

申请日：2023-09-28

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Ferdinando IUCOLANO ,  Cristina TRINGALI

IPC: H01L29/778 ,  H01L21/285 ,  H01L29/06 ,  H01L29/47 ,  H01L29/66

CPC classification number: H01L29/7786 ,  H01L21/28581 ,  H01L29/0649 ,  H01L29/475 ,  H01L29/66462 ,  H01L29/7787 ,  H01L29/2003

Abstract: An HEMT includes a semiconductor body, which includes a semiconductor heterostructure, and a conductive gate region. The gate region includes: a contact region, which is made of a first metal material and contacts the semiconductor body to form a Schottky junction; a barrier region, which is made of a second metal material and is set on the contact region; and a top region, which extends on the barrier region and is made of a third metal material, which has a resistivity lower than the resistivity of the first metal material. The HEMT moreover comprises a dielectric region, which includes at least one front dielectric subregion, which extends over the contact region, delimiting a front opening that gives out onto the contact region; and wherein the barrier region extends into the front opening and over at least part of the front dielectric subregion.

公开(公告)号：US20230261100A1

公开(公告)日：2023-08-17

申请号：US18167623

申请日：2023-02-10

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Ferdinando IUCOLANO ,  Andrea SEVERINO ,  Giuseppe GRECO ,  Fabrizio ROCCAFORTE

IPC: H01L29/778 ,  H01L29/16 ,  H01L29/66

CPC classification number: H01L29/7786 ,  H01L29/1608 ,  H01L29/66462

Abstract: A manufacturing process forms an HEMT device. For the manufacturing process includes forming, from a wafer of silicon carbide having a surface, an epitaxial layer of silicon carbide on the surface of the wafer A semiconductive heterostructure is formed on the epitaxial layer, and the wafer of silicon carbide is removed.

公开(公告)号：US20220216333A1

公开(公告)日：2022-07-07

申请号：US17703779

申请日：2022-03-24

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Ferdinando IUCOLANO

IPC: H01L29/778 ,  H01L29/40 ,  H01L29/66 ,  H01L29/78

Abstract: An HEMT includes: a heterostructure; a dielectric layer on the heterostructure; a gate electrode, which extends throughout the thickness of the dielectric layer; a source electrode; and a drain electrode. The dielectric layer extends between the gate electrode and the drain electrode and is absent between the gate electrode and the source electrode. In this way, the distance between the gate electrode and the source electrode can be designed in the absence of constraints due to a field plate that extends towards the source electrode.

公开(公告)号：US20210175350A1

公开(公告)日：2021-06-10

申请号：US17116465

申请日：2020-12-09

Applicant: STMicroelectronics S.r.l.

Inventor： Ferdinando IUCOLANO ,  Alessandro Chini

IPC: H01L29/778 ,  H01L29/40 ,  H01L29/205 ,  H01L29/20 ,  H01L29/66

Abstract: An HEMT transistor includes a semiconductor body having a semiconductive heterostructure. A gate region, of conductive material, is arranged above and in contact with the semiconductor body. A first insulating layer extends over the semiconductor body, laterally to the conductive gate region. A second insulating layer extends over the first insulating layer and the gate region. A first field plate region, of conductive material, extends between the first and the second insulating layers, laterally spaced from the conductive gate region along a first direction. A second field plate region, of conductive material, extends over the second insulating layer, and the second field plate region overlies and is vertically aligned with the first field plate region.