公开(公告)号：US20210091218A1

公开(公告)日：2021-03-25

申请号：US17115459

申请日：2020-12-08

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Ferdinando IUCOLANO ,  Alessandro CHINI

IPC: H01L29/778 ,  H01L29/66 ,  H01L29/06 ,  H01L21/02 ,  H01L29/20 ,  H01L29/205 ,  H01L29/40

Abstract: An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.

公开(公告)号：US20190288100A1

公开(公告)日：2019-09-19

申请号：US16431642

申请日：2019-06-04

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Ferdinando IUCOLANO ,  Alessandro CHINI

IPC: H01L29/778 ,  H01L21/02 ,  H01L29/20 ,  H01L29/66 ,  H01L29/06 ,  H01L29/205 ,  H01L29/40

Abstract: An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.

公开(公告)号：US20240178301A1

公开(公告)日：2024-05-30

申请号：US18530050

申请日：2023-12-05

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Ferdinando IUCOLANO ,  Alfonso PATTI ,  Alessandro CHINI

IPC: H01L29/66 ,  H01L29/20 ,  H01L29/205 ,  H01L29/423 ,  H01L29/778

CPC classification number: H01L29/66462 ,  H01L29/205 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/7786 ,  H01L29/7787 ,  H01L29/2003

Abstract: A method forms an HEMT transistor of the normally off type, including: a semiconductor heterostructure, which comprises at least one first layer and one second layer, the second layer being set on top of the first layer; a trench, which extends through the second layer and a portion of the first layer; a gate region of conductive material, which extends in the trench; and a dielectric region, which extends in the trench, coats the gate region, and contacts the semiconductor heterostructure. A part of the trench is delimited laterally by a lateral structure that forms at least one first step. The semiconductor heterostructure forms a first edge and a second edge of the first step, the first edge being formed by the first layer.

公开(公告)号：US20180358456A1

公开(公告)日：2018-12-13

申请号：US16004257

申请日：2018-06-08

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Ferdinando IUCOLANO ,  Alessandro CHINI

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/66 ,  H01L29/08 ,  H01L29/417 ,  H01L29/423

CPC classification number: H01L29/778 ,  H01L29/0847 ,  H01L29/1087 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/41725 ,  H01L29/41766 ,  H01L29/4232 ,  H01L29/4236 ,  H01L29/66462 ,  H01L29/7786

Abstract: An HEMT includes a buffer layer, a hole-supply layer on the buffer layer, a heterostructure on the hole-supply layer, and a source electrode. The hole-supply layer is made of P-type doped semiconductor material, the buffer layer is doped with carbon, and the source electrode is in direct electrical contact with the hole-supply layer, such that the hole-supply layer can be biased to facilitate the transport of holes from the hole-supply layer to the buffer layer.

公开(公告)号：US20230282727A1

公开(公告)日：2023-09-07

申请号：US18174462

申请日：2023-02-24

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Ferdinando IUCOLANO ,  Alessandro CHINI

IPC: H01L29/66 ,  H01L29/778 ,  H01L29/423 ,  H01L29/40

CPC classification number: H01L29/66462 ,  H01L29/7786 ,  H01L29/4232 ,  H01L29/401

Abstract: An HEMT device includes a heterostructure, an insulation layer that extends on the heterostructure and has a thickness along a first direction, and a gate region. The gate region has a first portion that extends through the insulation layer, throughout the thickness of the insulation layer, and has a second portion that extends in the heterostructure. The first portion of the gate region has a first width along a second direction transverse to the first direction. The second portion of the gate region has a second width, along the second direction, that is different from the first width.

公开(公告)号：US20230047815A1

公开(公告)日：2023-02-16

申请号：US17977971

申请日：2022-10-31

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Ferdinando IUCOLANO ,  Alessandro CHINI

IPC: H01L29/778 ,  H01L29/66 ,  H01L29/06 ,  H01L21/02 ,  H01L29/20 ,  H01L29/205 ,  H01L29/40

Abstract: An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.

公开(公告)号：US20210367062A1

公开(公告)日：2021-11-25

申请号：US17396154

申请日：2021-08-06

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Ferdinando IUCOLANO ,  Alfonso PATTI ,  Alessandro CHINI

IPC: H01L29/66 ,  H01L29/423 ,  H01L29/778 ,  H01L29/205

Abstract: A method forms an HEMT transistor of the normally off type, including: a semiconductor heterostructure, which comprises at least one first layer and one second layer, the second layer being set on top of the first layer; a trench, which extends through the second layer and a portion of the first layer; a gate region of conductive material, which extends in the trench; and a dielectric region, which extends in the trench, coats the gate region, and contacts the semiconductor heterostructure. A part of the trench is delimited laterally by a lateral structure that forms at least one first step. The semiconductor heterostructure forms a first edge and a second edge of the first step, the first edge being formed by the first layer.